2N7002DW_1 Datasheet, PDF (1/3 Pages) Diodes Incorporated – DUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR

SPICE MODEL: 2N7002DW
2N7002DW
DUAL N-CHANNEL ENHANCEMENT
MODE FIELD EFFECT TRANSISTOR
Features
• Dual N-Channel MOSFET
• Low On-Resistance
• Low Gate Threshold Voltage
• Low Input Capacitance
• Fast Switching Speed
• Low Input/Output Leakage
• Ultra-Small Surface Mount Package
• Lead Free/RoHS Compliant (Note 2)
• Qualified to AEC-Q101 Standards for High Reliability
K
J
Mechanical Data
• Case: SOT-363
• Case Material: Molded Plastic. UL Flammability Classification
Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020C
• Terminals: Solderable per MIL-STD-202, Method 208
• Lead Free Plating (Matte Tin Finish annealed over Alloy 42
leadframe).
• Terminal Connections: See Diagram
• Marking (See Page 2): K72
• Ordering & Date Code Information: See Page 2
• Weight: 0.006 grams (approx.)
A
D₂
G₁
S₁
BC
S₂
G₂
D₁
G
H
DF
L
D₂
G₁
S₁
S₂
G₂
D₁
SOT-363
Dim Min Max
A
0.10 0.30
B
1.15 1.35
C
2.00 2.20
D
0.65 Nominal
F
0.30 0.40
H
1.80 2.20
M
J

0.10
K
0.90 1.00
L
0.25 0.40
M
0.10 0.25
α
0°
8°
All Dimensions in mm
Maximum Ratings ^{@ TA = 25°C unless otherwise specified}
Characteristic
Drain-Source Voltage
Drain-Gate Voltage R_GS ≤ 1.0MΩ
Gate-Source Voltage (Note 1)
Continuous
Pulsed
Drain Current (Note 1)
Continuous
Continuous @ 100°C
Pulsed
Total Power Dissipation
Derating above TA = 25°C (Note 1)
Thermal Resistance, Junction to Ambient
Operating and Storage Temperature Range
Symbol
V_DSS
V_DGR
VGSS
ID
Pd
R_θJA
T_j, T_STG
2N7002DW
60
60
±20
±40
115
73
800
200
1.60
625
-55 to +150
Notes:
1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch; pad layout as shown on Diodes Inc. suggested pad layout
document AP02001, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf.
2. No purposefully added lead.
Units
V
V
V
mA
mW
mW/°C
°C/W
°C
DS30120 Rev. 8 - 2
1 of 3
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2N7002DW
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