DA7218 Datasheet, PDF (38/173 Pages) Dialog Semiconductor – Ultra-Low Power Stereo Codec

DA7218
Ultra-Low Power Stereo Codec
The DRE block, like the Hybrid-mode ALC, controls both the analog MICAMP gain and the digital
gain. However it applies equal and opposite adjustments to analog and digital gains so that total path
gain remains constant while the input dynamic range is increased.
DRE can be enabled for either or both ADCs using the ags_enable bits. The trigger level for the DRE
can be set in the range of –90 dB to 0 dB in 6 dB steps using ags_trigger. The maximum attenuation
that can be applied by the DRE can be set in the range of 0 dB to 36 dB in 6 dB steps using
ags_att_max. There is also a timeout of 0.1 s that can be enabled using ags_timeout_en, and a
mechanism to prevent clipping that can be enabled using ags_anticlip_en. Note that the input DRE
cannot be used with ALC. Only one of these functions can be used at any one time.
9.3.1.5 Automatic Level Control and Input Dynamic Range Extension Calibration
When using the ALC in Hybrid mode or when using the input DRE, the DC offset at the output of the
MICAMPs must be compensated for to prevent audible effects when the gains are changed. This
compensation is performed automatically if the following sequence is followed:
1. Enable the required MICAMP(s) unmuted.
2. Mute the MICAMP(s). Note that it is important to enable the MICAMPS unmuted before using
them in this step.
3. Enable the required MIXIN_1|2_AMP(s) and ADC(s) unmuted.
4. Enable the DAI or set the PC to Freerun mode.
5. Set calib_auto_en to 1 to start the calibration. This bit will clear to 0 once the calibration is
complete.
6. Set calib_offset_en to 1.
7. Enable the ALC in Hybrid mode or the DRE. Note that ALC and input DRE are mutually
exclusive, and only one should be enabled at any one time.
8. Unmute the MICAMP(s).
9.3.1.6 Level Detection
Level detection can be used to signal to the host processor (via the nIRQ pin) that the input signal
has exceeded the threshold level determined by lvl_det_level. Level detection can be enabled on any
or all of the four input filter channels using the lvl_det_en bits.
The threshold used for level detection can be programmed in the range of 1/128 full-scale to full-
scale using lvl_det_level.
9.3.2 Sidetone Processing
There is a mono, low-latency filter channel between inputs and outputs for implementing a sidetone
path. The input signal to any one of the four input channels (from DMIC or ADC) can also be routed
to the sidetone channel using sidetone_in_select.
The output from the sidetone channel can be added to left or right (or both) output filters using
outfilt_st_1l_src and outfilt_st_1r_src.
The sidetone filter itself contains a three-stage biquad filter that can be used to provide custom
filtering of the input signal.
The biquad filter also has a programmable gain stage to adjust the level of the sidetone signal. This
is controlled by sidetone_gain, and provides gain in the range -42 dB to +4.5 dB in 1.5 dB steps.
The sidetone path is enabled using sidetone_filter_en. and muted using sidetone_mute_en.
SIDETONE_FILTER
CIC
3×
BIQUAD
GAIN
STAGE
Datasheet
CFR0011-120-00
Figure 13: Sidetone Filter Block Diagram
Revision 2.5
38 of 173
01 Sep 2016
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