Q48SC12033 Datasheet, PDF (15/28 Pages) Delta Electronics, Inc. – 400W DC/DC Power Modules

DIGITAL FEATURE DESCRIPTIONS
The module has a digital PMBus interface to allow the
module to be monitored, controlled and configured by
the system. The module supports 4 PMBus signal
lines, Data, Clock, SMBALERT (optional), Control (C2
pin, optional), and 2 Address line Addr0 and Addr1.
More detail PMBus information can be found in the
PMB Power Management Protocol Specification, Part I
and part II, revision 1.2; which is shown in
http://pmbus.org . Both 100kHz and 400kHz bus
speeds are supported by the module. Connection for
the PMBus interface should be following the High
Power DC specifications given in section 3.1.3 in the
SMBus specification V2.0 or the Low Power DC
specifications in section 3.1.2. The complete SMBus
specification is shown in http://smbus.org.
The module supports the Packet Error Checking (PEC)
protocol. It can check the PEC byte provided by the
PMBus master, and include a PEC byte in all message
responses to the master. And the module also can
communicate with the master that does not implement
the PEC mechanism.
SMBALERT protocol is also supported by the module.
SMBALERT line is also a wired-AND signal; by which
the module can alert the PMBUS master via pulling the
SMBALERT pin to an active low. There are only one
way that the master and the module response to the
alert of SMBALERT line.
This way is for the module used in a system that does
not support Alert Response Address (ARA). The
module is to retain it’s resistor programmed address,
when it is in an ALERT active condition. The master will
communicate with the slave module using the
programmed address, and using the various
READ_STATUS commands to find who cause for the
SMBALERT. The CLEAR_FAULTS command will clear
the SMBALERT.
The module contains a data flash used to store
configuration settings, which will not be programmed
into the device data flash automatically. The
STORE_DEFAULT_ALL command must be used to
commit the current settings are transfer from RAM to
data flash as device defaults.
PMBUS Addressing
The Module has flexible PMBUS addressing capability.
When connect different resistor from Addr0 and Addr1
pin to GND pin, 64 possible addresses can be
acquired. The address is in the form of octal digits;
Each pin offer one octal digit, and then combine
together to form the decimal address as shown in
below.
Address = 8 * ADDR1 + ADDR0
Corresponded to each octal digit, the requested
resistor values are shown in below, and +/-1% resistors
accuracy can be accepted. If there is any resistances
exceeding the requested range, address 127 will be
return. 0-12 and 40, 44, 45, and 55 in decimal address
can’t be used, since they are reserved according to the
SMBus specifications, and which will also return
address 127.
Datasheet
DS_Q48SC12033_04062017
E-mail: [e-mail]
http://www.deltaww.com/dcdc
P15