Q54SG Datasheet, PDF (11/26 Pages) Delta Electronics, Inc. – Industry standard, DOSA compliant pin out

FEATURES DESCRIPTIONS (CON.)
The module supports the Packet Error Checking (PEC)
protocol. It can check the PEC byte provided by the
PMBus master, and include a PEC byte in all message
responses to the master.
SMBALERT protocol is also supported by the module.
SMBALERT line is also a wired-AND signal; by which
the module can alert the PMBUS master via pulling the
SMBALERT pin to an active low. There are two ways
that the master and the module response to the alert of
SMBALERT line.
One way is for the module used in a system that does
not support Alert Response Address (ARA). The module
is to retain it’s resistor programmed address, when it is
in an ALERT active condition. The master will
communicate with the slave module using the
programmed address, and using the various
READ_STATUS commands to find who cause for the
SMBALERT. The CLEAR_FAULTS command will clear
the SMBALERT.
The other way is for the module used in a system that
does support Alert Response Address (ARA). In this case,
the master simultaneously accesses all SMBALERT
devices through the ARA. Only the device which pulled
SMBALERT low will acknowledge the ARA. The master is
expected to perform the modified received byte operation
to get the address of the alert slave, and retire the
SMBALERT active signal. And then, the alter slave will
return to it’s resistor programmed address, allowing
normal master-slave communications to proceed.
If more than one slave pulls SMBALERT line low, the
lowest address slave will win communication rights via
standard arbitration during the slave address transfer.
After acknowledging the ARA, the lowest address slave
must disengage its SMBALERT pull down. If the master
still sees SMBALERT line low, it knows to send another
ARA and ask again “Now, who is holding the alert down”.
The second slave is now locked-up and can’t responsive.
But the solution is easy; the master should now initiate a
“dummy command”, for example read command on the
bus and read any parameter from any slave. After this,
the second slave (the one that lost arbitration in the first
run) will be released. Now, if master sends the second
ARA, the second slave will provide its address to the
Master.
The module contains a data flash used to store
configuration settings, which will not be programmed
into the device data flash automatically. The
STORE_DEFAULT_ALL command must be used to
commit the current settings are transfer from RAM to
data flash as device defaults.
PMBUS Addressing
The Module has flexible PMBUS addressing capability.
When connect different resistor from Addr0 and Addr1
pin to GND pin, 64 possible addresses can be acquired.
The address is in the form of octal digits; Each pin offer
one octal digit, and then combine together to form the
decimal address as shown in below.
Address = 8 * ADDR1 + ADDR0
Corresponded to each octal digit, the requested
resistor values are shown in below, and +/-5% resistors
accuracy can be accepted. If there is any resistances
exceeding the requested range, address 127 will be
return. 0-12 and 40, 44, 45, and 55 in decimal address
can’t be used, since they are reserved according to the
SMBus specifications, and which will also return
address 127.
Octal digit
0
1
2
3
4
5
6
7
Resistor(Kohm)
10
15.4
23.7
36.5
54.9
84.5
130
200
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DS_Q54SG12050_09092016