ADSD1420S Datasheet, PDF (1/5 Pages) Delta Electronics, Inc. – Dual 14-Bit, 20MSPS Sampling A/D Converter

ADSD-1420S
Dual 14-Bit, 20MSPS
Sampling A/D Converter
FEATURES
■ _{14-bit resolution; 20MSPS sampling rate}
■ _{Functionally complete; ±2.5V input range}
■ _{No missing codes over full temperature range}
■ _{Edge-triggered}
■ _{±5V supplies, 1.6 Watts}
■ _{75dB SNR, –80dB THD}
■ _{Ideal for both time and frequency-domain applications}
GENERAL DESCRIPTION
The ADSD-1420S is a functionally complete, dual
14-bit, 20MSPS, sampling A/D converter. Its standard,
40-pin, triple-wide SMT DIP contains two fast-settling
sample/hold amplifiers, two 14-bit A/D converters,
multiplexed output buffers, a precision reference, and
all the timing and control logic necessary to operate
from either two or a single start convert pulse.
The ADSD-1420S is optimized for wideband
frequency-domain applications and is fully FFT tested.
The ADSD-1420S requires only ±5V supplies and
typically consumes 1.6 Watts. The digital output power
supply is capable of directly driving 5V or 3V logic
systems. Models are available in either commercial
0 to +70°C or military -55 to +125°C operating
temperature ranges.
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION
PIN FUNCTION
1
INPUT A
40 INPUT B
2
+5VA
39 +5VA
3
ANALOG GROUND
38 ANALOG GROUND
4
N.C.
37 N.C.
5
OFFSET A
36 OFFSET B
6
RANGE
35 N.C.
7
1.55V REF
34 EOC A
8
ANALOG GROUND
33 ANALOG GROUND
9
–5V
32 –5V
10 ENABLE A
31 ENABLE B
11 START A
30 START B
12 VDD
29 EOC B
13 BIT 14 (LSB)
28 BIT 1 (MSB)
14 BIT 13
27 BIT 2
15 BIT 12
26 BIT 3
16 BIT 11
25 BIT 4
17 BIT 10
24 BIT 5
18 BIT 9
23 BIT 6
19 BIT 8
22 BIT 7
20 DGND
21 DGND
�������������������
����������������
����������������������
�����������������
��������������
���������
������������
�����������
���������������
������������������
��������
��������
www.cd4power.com
�
���
�����
�
�
���
�����
�
������
������
���
�
���
�
���
����������
�������������
��
���
�����
���
�����
����
��������������
����
������
����
���������
���
Figure 1. ADSD-1420S Functional Block Diagram
�������������
�������
�������
�������
�������
�������
��������
������
������
������
������
������
������
�������
Page 1 of 5