DCAN Datasheet, PDF (1/3 Pages) Digital Core Design – Configurable CAN Bus Controller

DCAN
Configurable CAN Bus Controller
ver 1.01
OVERVIEW
The DCAN is a stand-alone controller for the
Controller Area Network (CAN) widely used in
automotive and industrial applications. DCAN
conforms to Bosch CAN 2.0B specification
(2.0B Active). Core has simple CPU interface
(8/16/32 bit configurable data width) with little
or big endian adressing scheme. Hardware
message filtering and 64 byte receive FIFO
enables back-to-back message reception with
minimum CPU load. The DCAN is described
at RTL level allowing target use in FPGA or
ASIC technologies.
KEY FEATURES
● Conforms to Bosch CAN 2.0B Active
● 8/16/32-bit CPU slave interface with little
or big endianess
● Simple interface allows easy connection
to CPU
● Supports both standard (11-bit identifier)
and extended (29 bit identifier) frames.
● Data rate up to 1 Mbps
● Hardware message filtering (dual/single
filter)
● 64 byte receive FIFO
● One transmit buffer
● No overload frames are generated
● Normal & Listen Only Mode
● Single Shot transmission
● Ability to abort transmission
● Readable error counters
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● Last Error Code
● Fully synthesizable
● Static synchronous design with positive
edge clocking and synchronous reset
● No internal tri-states
● Scan test ready
APPLICATIONS
● Embedded communication systems
● Automotive, industrial
● Medical equipment
DELIVERABLES
♦ Source code:
◊ VHDL Source Code
♦ VHDL test bench environment
◊ Active-HDL automatic simulation mac-
ros
◊ ModelSim automatic simulation macros
◊ Tests with reference responses
♦ Technical documentation
◊ Installation notes
◊ HDL core specification
◊ Datasheet
♦ Synthesis scripts
♦ Example application
♦ Technical support
◊ IP Core implementation support
◊ 3 months maintenance
● Delivery the IP Core updates, minor
and major versions changes
● Delivery the documentation updates
● Phone & email support
http://www.DigitalCoreDesign.com
http://www.dcd.pl
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