D68000 Datasheet, PDF (1/4 Pages) Digital Core Design – 16/32-bit Microprocessor

D68000
16/32-bit Microprocessor
ver 1.15
OVERVIEW
D68000 soft core is binary-compatible with the
industry standard 68000 32-bit microcontroller.
D68000 has a 16-bit data bus and 24-bit ad-
dress data bus. It is code compatible with the
MC68008 and is upward code compatible with
the MC68010 virtual extensions and the
MC68020 32-bit implementation of the architec-
ture. D68000 has improved instructions set al-
lows execution of a program with higher per-
formance than standard 68000 core.
D68000 is delivered with fully automated test-
bench and complete set of tests allowing
easy package validation at each stage of SoC
design flow.
KEY FEATURES
● Software compatible with industry standard
68000
● MULS, MULU take 28 clock periods
● DIVS, DIVU take 28 clock periods
● Optimized shifts and rotations
● Idle cycles removed to improve perform-
ance
● Shorter effective address calculation time
● Bus cycle timings identical to 68000
● 32 bit data and address registers
● 14 addressing modes:
○ Direct:
○ Data register direct
○ Address register direct
○ Indirect:
○ Register indirect
○ Postincrement register indirect
○ Predecrement register indirect
○ Register indirect with offset
○ Indexed register indirect with offset
○ PC relative:
○ Relative with offset
○ Relative with index and offset
○ Absolute data:
○ Absolute short
○ Absolute long
○ Immediate data:
○ Immediate
○ Quick immediate
○ Implied
● 5 data types supported:
○ bits
○ BCD
○ bytes, words and long words
● Arithmetic Logic Unit includes:
○ 8,16,32-bit arithmetic & logical operations
○ 16x16 bit signed and unsigned multiplication
○ 32/16 bit signed and unsigned division
○ Boolean operations
● Interrupt controller:
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