DM9010B Datasheet, PDF (32/62 Pages) Davicom Semiconductor, Inc. – 10/100 Mbps Single Chip Ethernet Controller With General Processor Interface

DM9010B
Single Chip Ethernet Controller with General Processor Interface
8. MII REGISTER DESCRIPTION
ADD Name 15
00 CONTR Reset
OL
0
01 STATUS T4
Cap.
0
02 PHYID1 0
03 PHYID2
04 Auto-Neg. Next
Advertise Page
05 Link Part. LP
Ability Next
Page
06 Auto-Neg.
Expansio
n
16 Specifie BP
d 4B5B
Config.
17 Specifie 100
d FDX
Conf/Stat
18 10T Rsvd
Conf/Stat
14
Loop
back
0
TX FDX
Cap.
1
0
FLP Rcv
Ack
LP
Ack
BP
SCR
100
HDX
LP
Enable
13
12
11
Speed Auto-N Power
select Enable Down
1
1
0
TX HDX 10 FDX 10 HDX
Cap. Cap. Cap.
1
1
1
0
0
0
OUI_LSB
101110
Remote Reserved
Fault
LP
Reserved
RF
10
Isolate
0
0
FC
Adv
LP
FC
9
8
7
6
5
4
3
2
1
0
Restart Full
Coll.
Reserved
Auto-N Duplex Test
0
1
0
000_0000
Reserved
Pream. Auto-N Remote Auto-N Link Jabber Extd
Supr. Compl. Fault Cap. Status Detect Cap.
0000
1
0
0
1
0
0
1
0
1
1
0
0
0
0
0
0
1
Model No.
Version No.
01010
0000
T4 TX FDX TX HDX 10 FDX 10 HDX
Advertised Protocol Selector Field
Adv Adv Adv Adv Adv
LP
LP
LP
LP
LP
Link Partner Protocol Selector Field
T4 TX FDX TX HDX 10 FDX 10 HDX
Reserved
Pardet LP Next Next Pg New Pg LP AutoN
Fault Pg Able Able
Rcv
Cap.
BP BP_ADP Reserve TX Reserve Reserve Force Reserve Reserve RPDCTR Reset Pream. Sleep Remote
ALIGN OK
dr
d
d 100LNK d
d
-EN St. Mch Supr. mode LoopOut
10 10 HDX Reserve Reverse Reverse
FDX
d
d
d
PHY ADDR [4:0]
Auto-N. Monitor Bit [3:0]
HBE SQUE JAB Reserve
Enable Enable Enable d
Reserved
Polarity
Reverse
19 PWDOR
Reserved
PD10DR PD100l PDchip PDcrm PDaeq PDdrv PDecli PDeclo PD10
V
20 Specified TSTSE1 TSTSE2 FORCE_ FORCE_
config
TXSD FEF
Reserved
MDIX_C AutoNeg Mdix_fix Mdix_do MonSel1 MonSel0 Reserve PD_valu
NTL _dlpbk Value wn
d
e
Key to Default
In the register description that follows, the default
column takes the form:
<Reset Value>, <Access Type> / <Attribute(s)>
Wherej
<Reset Value>:
1 Bit set to logic one
0 Bit set to logic zero
X No default value
<Access Type>:
RO = Read only
RW = Read/Write
<Attribute (s)>:
SC = Self clearing
P = Value permanently set
LL = Latching low
LH = Latching high
Preliminary
32
Version: DM9010B--DS-P01
September 5, 2007