DM9620I Datasheet, PDF (18/71 Pages) Davicom Semiconductor, Inc. – USB2.0 to 10/100M Fast Ethernet Controller

DM9620/DM9620I
USB2.0 to Fast Ethernet Controller
4.3 TX Control Register (02H)
Bit
Name
Default
7 RESERVED 0,RO
6
TJDIS
PHS0,RW
5
EXCECM PHS0,RW
4:3 RESERVED PHS0,RW
Description
Reserved
Transmit Jabber Disable
When set, the transmit Jabber Timer(2048 bytes) is disabled. Otherwise the
transmit packet size can more than 2048-byte.
Excessive Collision Mode Control :
0:abort this packet when excessive collision count more than 15,
1: still try to transmit this packet
Reserved
2
PAD_DIS1 PHS0,RW TX Packet PAD Append Control:
0: the transmit packet size is appended to at least 64-byte.
1: the transmit packet size is unchanged from original setting.
1
CRC_DIS1 PHS0,RW TX Packet Index II CRC Appends Control:
0: the CRC field is appended automatically.
1: the CRC field is not appended.
0 RESERVED PHS0,RW Reserved
4.4 RX Control Register ( 05H )
Bit
Name
Default
Description
7
HASHALL PHS0,RW Filter All address in Hash Table
6
WTDIS
PHS0,RW Watchdog Timer Disable
When set, the Watchdog Timer(2048 bytes) is disabled and the RX packet may
more than 2048-byte.
When cleared, the Watchdog Timer(2048 bytes) is enabled and he RX packet is
truncated after the data more than 2048-byte
5
DIS_LONG PHS0,RW Discard Long Packet
When set, the packets with length over 1522-byte are discarded from RX memory.
4
DIS_CRC PHS0,RW Discard CRC Error Packet
When set, the packets with CRC error are discarded from RX memory.
3
ALL
PHS0,RW Pass All Multicast
When set, the packets with multicast destination address are stored to RX memory.
2
RUNT
PHS0,RW Pass Runt Packet
When set, the packets with size less than 64-byte are stored to RX memory.
1
PRMSC PHS0,RW Promiscuous Mode
When set, the destination address is do not be checked.
0
RXEN
PHS0,RW RX Enable
When set, the received accepted packets can be stored to RX memory.
Preliminary
18
Version: DM9620/DM9620I -15-DS-P02
December 26, 2011