DM9161EP Datasheet, PDF (1/3 Pages) Davicom Semiconductor, Inc. – 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

DM9161EP Product Brief
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
June 2008 Rev.1.0
The DM9161EP is a physical layer, single-chip, and low power transceiver for
100BASE-TX 100BASE-FX and 10BASE-T operations. On the media side, it
provides a direct interface either to Unshielded Twisted Pair Category 5 Cable (UTP5)
for 100BASE-TX Fast Ethernet, or UTP5/UTP3 Cable for 10BASE-T Ethernet.
Through the Media Independent Interface (MII), the DM9161EP connects to the
Medium Access Control (MAC) layer, ensuring a high inter-operability from different
vendors.
The DM9161EP uses a low power and high performance CMOS process. It contains
the entire physical layer functions of 100BASE-TX as defined by IEEE802.3u,
including the Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA),
Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), 10BASE-TX
Encoder/Decoder (ENC/DEC), and Twisted Pair Media Access Unit (TPMAU). The
DM9161EP provides a strong support for the auto-negotiation function, utilizing
automatic media speed and protocol selection. Furthermore, due to the built-in
wave-shaping filter, the DM9161EP needs no external filter to transport signals to the
media in 100MBASE-TX or 10MBASE-T Ethernet operation.
Block Diagram
100Base-FX
PECL
Interface
100Base-TX
Transceiver
Clock
Circuit
Block
100Base-
TX
PCS
MII/RMII/
GPSI
Interface
10Base-T
TX/RX Module
Auto-Negotiation
Biasing/
Power
Block
MII
Register
LED Driver
MII
Management
Control