DDU66C Datasheet, PDF (4/4 Pages) Data Delay Devices, Inc. – 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C)

DDU66C
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
Ambient Temperature: 25^oC ± 3^oC
Supply Voltage (VDD): 5.0V ± 0.1V
Input Pulse:
High = 5.0V ± 0.1V
Low = 0.0V ± 0.1V
Source Impedance: 50Ω Max.
Rise/Fall Time:
5.0 ns Max. (measured
between 0.5V and 4.5V )
Pulse Width:
Period:
PW_IN = 1.5 x Total Delay
PER_IN = 10 x Total Delay
OUTPUT:
Load:
C_load:
Threshold:
1 FAST-TTL Gate
5pf ± 10%
2.5V (Rising & Falling)
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
COMPUTER
SYSTEM
PRINTER
PULSE
GENERATOR
OUT
TRIG
IN DEVICE UNDER T1
TEST (DUT)
T2
T3
T4
T5
REF
IN
TRIG
TIME INTERVAL
COUNTER
Test Setup
T_RISE
PW_IN
PER_IN
T_FALL
INPUT
4.5V
V_IH
4.5V
SIGNAL
2.5V
0.5V
2.5V
0.5V
V_IL
T_RISE
T_FALL
OUTPUT
SIGNAL
2.5V
V_OH
2.5V
V_OL
Timing Diagram For Testing
Doc #97021
DATA DELAY DEVICES, INC.
4
2/5/97
Tel: [phone] Fax: [phone] http://www.datadelay.com