3D7220 Datasheet, PDF (1/4 Pages) Data Delay Devices, Inc. – MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7220)

MONOLITHIC 10-TAP
FIXED DELAY LINE
(SERIES 3D7220)
3D7220
FEATURES
PACKAGES
• All-silicon, low-power CMOS technology
• TTL/CMOS compatible inputs and outputs
• Vapor phase, IR and wave solderable
• Auto-insertable (DIP pkg.)
• Low ground bounce noise
IN 1
N/C 2
O2 3
O4 4
14 VDD
13 O1
12 O3
11 O5
IN
N/C
O2
O4
O6
O8
GND
1 14
2 13
3 12
4 11
5 10
69
78
VDD
O1
O3
O5
O7
O9
O10
• Leading- and trailing-edge accuracy
O6 5 10 O7
3D7220D-xx SOIC
• Delay range: 0.75ns through 7000ns
O8 6 9 O9
IN 1
16 VDD
• Delay tolerance: 2% or 0.5ns
• Temperature stability: ±2% typical (-40C to 85C)
GND 7
8 O10
N/C 2
N/C 3
O2 4
15 N/C
14 O1
13 O3
• Vdd stability: ±1% typical (4.75V-5.25V)
• Minimum input pulse width: 15% of total delay
3D7220-xx DIP
3D7220G-xx Gull-Wing
O4 5
O6 6
O8 7
12 O5
11 O7
10 O9
• 14-pin Gull-Wing available as drop-in
replacement for hybrid delay lines
For mechanical dimensions, click here.
For package marking details, click here.
GND 8
9 O10
3D7220S-xx SOL
FUNCTIONAL DESCRIPTION
The 3D7220 10-Tap Delay Line product family consists of fixed-delay
CMOS integrated circuits. Each package contains a single delay line,
tapped and buffered at 10 points spaced uniformly in time. Tap-to-tap
(incremental) delay values can range from 0.75ns through 700ns. The
input is reproduced at the outputs without inversion, shifted in time as
per the user-specified dash number. The 3D7220 is TTL- and CMOS-
compatible, capable of driving ten 74LS-type loads, and features both
rising- and falling-edge accuracy.
The all-CMOS 3D7220 integrated circuit has been designed as a
reliable, economic alternative to hybrid TTL fixed delay lines. It is
offered in a standard 14-pin auto-insertable DIP and space saving
surface mount 14-pin SOIC and 16-pin SOL packages.
PIN DESCRIPTIONS
IN
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
VDD
GND
Delay Line Input
Tap 1 Output (10%)
Tap 2 Output (20%)
Tap 3 Output (30%)
Tap 4 Output (40%)
Tap 5 Output (50%)
Tap 6 Output (60%)
Tap 7 Output (70%)
Tap 8 Output (80%)
Tap 9 Output (90%)
Tap 10 Output (100%)
+5 Volts
Ground
TABLE 1: PART NUMBER SPECIFICATIONS
DASH
NUMBER
-.75
-1
-1.5
-2
-2.5
-4
-5
-10
-20
-50
-100
-700
TOLERANCES
TOTAL
TAP-TAP
DELAY (ns) DELAY (ns)
6.75 ± 0.5*
0.75 ± 0.4
9.0 ± 0.5*
1.0 ± 0.5
13.5 ± 0.5*
1.5 ± 0.7
18.0 ± 0.5*
2.0 ± 0.8
22.5 ± 0.5*
2.5 ± 1.0
36.0 ± 0.7*
4.0 ± 1.3
50.0 ± 1.0
5.0 ± 1.5
100.0 ± 2.0
10.0 ± 2.0
200.0 ± 4.0
20.0 ± 4.0
500.0 ± 10
50.0 ± 10
1000 ± 20
100 ± 20
7000 ± 140
700 ± 140
Rec’d Max
Frequency
28.4 MHz
23.8 MHz
18.0 MHz
14.5 MHz
12.1 MHz
8.33 MHz
6.67 MHz
3.33 MHz
1.67 MHz
0.67 MHz
0.33 MHz
0.05 MHz
INPUT RESTRICTIONS
Absolute Max Rec’d Min
Frequency Pulse Width
166.7 MHz
17.6 ns
166.7 MHz
21.0 ns
166.7 MHz
27.8 ns
166.7 MHz
34.5 ns
125.0 MHz
41.2 ns
133.3 MHz
60.0 ns
66.7 MHz
75.0 ns
33.3 MHz
150 ns
16.7 MHz
300 ns
6.67 MHz
750 ns
3.33 MHz
1500 ns
0.48 MHz
10500 ns
Absolute Min
Pulse Width
3.00 ns
3.00 ns
3.00 ns
3.00 ns
4.00 ns
6.00 ns
7.50 ns
15.0 ns
30.0 ns
75.0 ns
150 ns
1050 ns
* Total delay referenced to Tap1 output; Input-to-Tap1 = 5.0ns ± 1.0ns
NOTE: Any dash number between .75 and 700 not shown is also available as standard.
2005 Data Delay Devices
Doc #03004
DATA DELAY DEVICES, INC.
1
4/15/05
3 Mt. Prospect Ave. Clifton, NJ 07013