DS1670 Datasheet, PDF (9/17 Pages) Dallas Semiconductor – Portable System Controller

DS1670
The third microprocessor monitoring function provided by the DS1670 is a watchdog timer. The
watchdog timer function forces RST to the active state when the ST input is not stimulated within the
predetermined time period. The time period is set by the Time Delay (TD) bits in the Watchdog Register.
The time delay can be set to 250 ms, 500 ms, or 1000 ms (see Figure 5). If TD0 and TD1 are both set to
0, the watchdog timer is disabled. When enabled, the watchdog timer starts timing out from the set time
period as soon as RST is inactive. The default setting is for the watchdog timer to be enabled with
1000 ms time delay. If a high-to-low transition occurs on the ST input pin prior to time-out, the
watch-dog timer is reset and begins to time-out again. If the watchdog timer is allowed to time-out, then
the RST signal is driven to the active state for 250 ms (typical). The ST input can be derived from
microprocessor address signals, data signals, and/or control signals. To guarantee that the watchdog
timer does not time-out, a high-to-low transition must occur at or less than the minimum period.
WATCHDOG TIME-OUT CONTROL Figure 5
WATCHDOG REGISTER
BIT 7 BIT 6 BIT 5
0
0
0
BIT 4 BIT 3 BIT 2
0
0
0
BIT 1
TD1
BIT 0
TD0
WATCHDOG TIME-OUT
TD1 TD0
WATCHDOG TIME-OUT
0
0 Watchdog disabled
0
1 250 ms
1
0 500 ms
1
1 1000 ms
ANALOG-TO-DIGITAL CONVERTER
The DS1670 provides a 3-channel, 8-bit analog-to-digital converter. The A/D reference voltage (2.55V
typical) is derived from an on-chip band-gap circuit. Three multiplexed analog inputs are provided
through the AIN0, AIN1, and AIN2 pins. The A/D converter is monotonic (no missing codes) and uses a
successive approximation technique to convert the analog signal into a digital code. An A/D conversion
is the process of assigning a digital code to an analog input voltage. This code represents the input value
as a fraction of the full-scale voltage (FSV) range. Thus the FSV range is then divided by the A/D
converter into 256 codes (8 bits). The FSV range is bounded by an upper limit equal to the reference
voltage and the lower limit, which is ground. The DS1670 has a FSV of 2.55V (typical) which provides a
resolution of 10 mV. An input voltage equal to the reference voltage converts to FFh while an input
voltage equal to ground converts to 00h. The relative linearity of the A/D converter is ±0.5 LSB.
The A/D converter selects from one of three different analog inputs (AIN0 - AIN2). The input that is
selected is determined by the Analog Input Select (AIS) bits in the Control Register. Table 2 lists the
specific analog input that is selected by these 2 bits. Note also that the converter can be turned off by
these bits to reduce power. When the A/D is turned on by setting AIS0 and AIS1 to any value other than
0,0 the analog input voltage is converted and written to the ADC Register within 488 ms. An internal
analog filter at the input reduces high frequency noise. Subsequent updates occur approximately every
10 ms. If AIS0 and/or AIS1 are changed, updates will occur at the next 10 ms conversion time.
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