DS1668 Datasheet, PDF (9/10 Pages) Dallas Semiconductor – ELECTRONIC DIGITAL RHEOSTAT

DS1668, DS1669, DS1669S
NOTES:
1. All inputs; UV, DC, and D are internally pulled up with a resistance of 100KΩ.
2. Input logic levels are referenced to -V.
3. I_CC is the internal current that flows between -V and +V.
4. Input leakage applies to contact inputs UC and DC and digital input (D).
5. Wiper current and rheostat currents are the maximum current which can flow in the resistive elements.
6. Capacitance values apply at 25°C.
7. Input pulse width is the minimum time required for an input to cause an increment or decrement. If the UC,
DC or D input is held active for longer than 1 second, subsequent increments or decrements will occur on 100
ms intervals until the inputs UC, DC, and/or D is released to V_IH.
8. Repetitive pulsed inputs on UC, DC, or D will be recognized as long as the pulse repetition occurs within 1
second of each other. Pulses occurring faster than 1 ms apart may not be recognized as individual inputs but
can be interpreted a constant input.
9. Idle state supply current is measured with no pushbutton depressed and with the wiper. R_W tied to a CMOS
load.
10. Maximum time required for the Dallastat to determine single or dual push button operation after input supply
has reached 10% recommended supply operating conditions.
11. Aboslute linearity is used to determine wiper voltage versus expected voltage as determined by wiper posi-
tion.
12. Relative linearity is used to determine the change in voltage between successive tap positions.
13. –3 dB cutoff frequency characteristics for the DS1669 depend on potentiometer total resistance:
DS1669–010; 1 MHz, DS1669–050; 200 KHz, DS1669–100; 100 KHz.
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