DS1482 Datasheet, PDF (7/7 Pages) Dallas Semiconductor – 1-Wire Level Shifter and Line Driver with Load Sensor

PARAMETER SYMBOL CONDITIONS
MIN
OUTPUT PIN RXD
Output-Low Voltage
Output-High Voltage
V_OL 100µA load
V_OH -100µA load
V_CCQ - 0.5V
Output Rise Time
(50pF Load)
t_R
0.1 x V_CCQ to 0.9 x V_CCQ
Output Fall Time
(50pF Load)
t_F
0.9 x V_CCQ to 0.1 x V_CCQ
Delay I/O to RXD
(50pF Load)
t_IR See Figure 6 (Note 2)
OUTPUT PIN PCTLZ
Output-Low Voltage
Output-High Voltage
V_OL 100µA load
V_OH -100µA load
V_CC - 0.5V
Output Rise Time
(50pF Load)
t_R
0.1 x V_CC to 0.9 x V_CC
Output Fall Time
(50pF Load)
t_F
0.9 x V_CC to 0.1 x V_CC
Delay SPU to PCTLZ
(50pF Load)
t_SP
See Figure 7 (Note 4)
OUTPUT PIN DONE
Output-Low Voltage
Output-High Voltage
V_OL 100µA load
V_OH -100µA load
V_CCQ - 0.5V
Output Rise Time
(50pF Load)
t_R
0.1 x V_CCQ to 0.9 x V_CCQ
Output Fall Time
(50pF Load)
t_F
0.9 x V_CCQ to 0.1 x V_CCQ
Delay I/O to DONE
(50pF Load)
t_CF START at V_CCQ (Note 5) 128
Delay START to
DONE (50pF Load)
t_SD See Figure 8
TYP
DS1482
MAX UNITS
0.4
V
V
50
ns
50
ns
100
ns
0.4
V
V
50
ns
50
ns
100
ns
0.4
V
V
50
ns
50
ns
500
µs
100
ns
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
The input pins have a weak pulldown.
For OD read- or write-1 time slots, TXD should be pulsed high for 1.28µs. The window for
sampling RXD begins 1.8µs after TXD has turned high and ends 2.05µs after TXD has turned
high. RXD must be sampled inside this window. Correct sampling can be achieved with the
particular recommended microcontroller Hitachi SH7622 if the peripheral module operating
frequency PF is higher or equal to 22MHz.
Measured either with V_CC on the pin and TXD low or with 0V on the pin and TXD high. This
parameter is guaranteed by design, and is not production tested.
The PCTLZ signal is gated by TXD. The PCTLZ output is only low if TXD is low.
Characteristic of the glitch-eating filter on the output of the load-sensing comparator, i.e., an
event where the downstream 1-Wire slave device is sinking high current, ceases sinking the
current for less than this amount of time, and resumes sinking the current does not generate
high level on DONE; DONE goes high this amount of time after the downstream 1-Wire slave
device has ceased sinking high current.
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