DS2251 Datasheet, PDF (5/20 Pages) Dallas Semiconductor – 128k Soft Microcontroller Module

PIN
16
17
9
29
30
19, 18
20
40
72
54-41
63-56
64
66
67
31
DS2251T
DESCRIPTION
P3.6 WR . General purpose I/O port pin. Also serves as the write strobe for Expanded bus
operation.
P3.7 RD . General purpose I/O port pin. Also serves as the read strobe for Expanded bus
operation.
RST - Active high reset input. A logic 1 applied to this pin will activate a reset state. This
pin is pulled down internally, can be left unconnected if not used. An RC power-on reset
circuit is not needed and is NOT recommended.
PSEN - Program Store Enable. This active low signal is used to enable an external program
memory when using the Expanded bus. It is normally an output and should be unconnected
if not used.
ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded
Address/Data bus on Port 0. This pin is normally connected to the clock input on a ‘373
type transparent latch.
XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator. XTAL1 is
the input to an inverting amplifier and XTAL2 is the output.
GND - Logic ground.
V_CC - +5V.
BA15 - Monitor test point to reflect the logical value of A15. Not needed for memory
access.
BA13 - 0. Byte-wide Address bus bits 13-0. This bus is combined with the non-multiplexed
data bus (BD7-0) to access onboard NV SRAM and off-board peripherals. Peripheral
decoding is performed using PE3 and PE4 . These are on 16k boundaries, so BA14 or BA15
are not needed. Read/write access is controlled by R/ W . BA13-0 connect directly to
memory mapped peripherals.
BD7 - 0. Byte-wide Data bus bits 7-0. This 8-bit bi-directional bus is combined with the
non-multiplexed address bus (BA14-0) to access on-board NV SRAM and off-board
peripherals.
R/ W - Read/Write. This signal provides the write enable to the SRAMs on the Byte-wide
bus. It is controlled by the memory map and Partition. The blocks selected as Program
(ROM) will be write-protected. This signal is also used for the write enable to off-board
peripherals.
PE3 - Peripheral Enable 3. Accesses data memory between addresses 8000h and BFFFh
when the PES bit is set to a logic 1. PE3 is not lithium backed and can be connected to any
type of peripheral function.
PE4 - Peripheral Enable 4. Accesses data memory between addresses C000h and FFFFh
when the PES bit is set to a logic 1. PE4 is not lithium backed and can be connected to any
type of peripheral function.
PROG - Invokes the Bootstrap loader on a falling edge. This signal should be debounced so
that only one edge is detected. If connected to ground, the micro will enter Bootstrap
loading on power-up. This signal is pulled up internally.
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