DS1306_05 Datasheet, PDF (5/21 Pages) Dallas Semiconductor – Serial Alarm Real-Time Clock

RECOMMENDED LAYOUT FOR CRYSTAL
Local ground plane (Layer 2)
X1
crystal
X2
GND
DS1306
CLOCK ACCURACY
The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was
trimmed. Additional error is added by crystal frequency drift caused by temperature shifts. External
circuit noise coupled into the oscillator circuit can result in the clock running fast. Refer to Application
Note 58: Crystal Considerations with Dallas Real-Time Clocks for detailed information.
CLOCK, CALENDAR, AND ALARM
The time and calendar information is obtained by reading the appropriate register bytes. The RTC
registers are illustrated in Figure 2. The time, calendar, and alarm are set or initialized by writing the
appropriate register bytes. Note that some bits are set to 0. These bits always read 0 regardless of how
they are written. Also note that registers 12h to 1Fh (read) and registers 92h to 9Fh are reserved. These
registers always read 0 regardless of how they are written. The contents of the time, calendar, and alarm
registers are in the BCD format.. Values in the day register that correspond to the day of the week are
user-defined, but must be sequential (e.g. if 1 equals Sunday, 2 equals Monday and so on). The day
register increments at midnight. Illogical time and date entries result in undefined operation.
WRITING TO THE CLOCK REGISTERS
The internal time and date registers continue to increment during write operations. However, the
countdown chain is reset when the seconds register is written. Writing the time and date registers within
one second after writing the seconds register ensures consistent data.
Terminating a write before the last bit is sent aborts the write for that byte.
READING FROM THE CLOCK REGISTERS
Buffers are used to copy the time and date register at the beginning of a read. When reading in burst
mode, the user copy is static while the internal registers continue to increment.
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