DS1822-PAR_07 Datasheet, PDF(2/19 Page) Dallas Semiconductor – Econo 1-Wire Parasite-Power Digital Thermometer

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DS1822-PAR_07 Datasheet, PDF (2/19 Pages) Dallas Semiconductor – Econo 1-Wire Parasite-Power Digital Thermometer

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DS1822-PAR

DETAILED PIN DESCRIPTIONS Table 1

PIN SYMBOL DESCRIPTION

GND Ground.

DQ Data Input/Output pin. Open-drain 1-Wire interface pin. Also provides power

to the device when used in parasite power mode (see âParasite Powerâ section.)

NC No Connect. Doesnât connect to internal circuit.

OVERVIEW

The DS1822-PAR uses Dallasâ exclusive 1-Wire bus protocol that implements bus communication using

one control signal. The control line requires a weak pullup resistor since all devices are linked to the bus

via a 3-state or open-drain port (the DQ pin in the case of the DS1822-PAR). In this bus system, the

microprocessor (the master device) identifies and addresses devices on the bus using each deviceâs unique

64-bit code. Because each device has a unique code, the number of devices that can be addressed on one

bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of the commands and

âtime slots,â is covered in the 1-WIRE BUS SYSTEM section of this data sheet.

An important feature of the DS1822-PAR is its ability to operate without an external power supply.

Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The

high bus signal also charges an internal capacitor (CPP), which then supplies power to the device when the

bus is low. This method of deriving power from the 1-Wire bus is referred to as âparasite power.â

Figure 1 shows a block diagram of the DS1822-PAR, and pin descriptions are given in Table 1. The

64-bit ROM stores the deviceâs unique serial code. The scratchpad memory contains the 2-byte

temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad

provides access to the 1-byte upper and lower alarm trigger registers (TH and TL). The TH and TL registers

are NV (EEPROM), so they will retain their data when the device is powered down.

DS1822-PAR BLOCK DIAGRAM Figure 1

VPU

4.7K

GND

PARASITE POWER

CIRCUIT

INTERNAL VDD

CPP

64-BIT ROM

AND

1-wire PORT

DS1822-PAR MEMORY CONTROL

LOGIC

SCRATCHPAD

TEMPERATURE SENSOR

ALARM HIGH TRIGGER (TH)

ALARM LOW TRIGGER (TL)

CONFIGURATION REGISTER

(EEPROM)

8-BIT CRC GENERATOR

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