DS2152 Datasheet, PDF (19/94 Pages) Dallas Semiconductor – Enhanced T1 Single-Chip Transceiver

RCR2: RECEIVE CONTROL REGISTER 2 (Address=2C Hex)
(MSB)
RCS
RZBTSI RSDW
RSM
RSIO RD4YM FSBE
DS2152
(LSB)
MOSCRF
SYMBOL
RCS
RZBTSI
RSDW
RSM
RSIO
RD4YM
FSBE
MOSCRF
POSITION NAME AND DESCRIPTION
RCR2.7
Receive Code Select. See Section 8 for more details.
0 = idle code (7F Hex)
1 = digital milliwatt code (1E/0B/0B/1E/9E/8B/8B/9E Hex)
RCR2.6
Receive Side ZBTSI Enable.
0 = ZBTSI disabled
1 = ZBTSI enabled
RCR2.5
RSYNC Double-Wide. (note: this bit must be set to 0 when
RCR2.4 = 1 or when RCR2.3 = 1)
0 = do not pulse double-wide in signaling frames
1 = do pulse double-wide in signaling frames
RCR2.4
RSYNC Mode Select. (A Don’t Care if RSYNC is programmed
as an input)
0 = frame mode (see the timing in Section 15)
1 = multiframe mode (see the timing in Section 15)
RCR2.3
RSYNC I/O Select. (note: this bit must be set to 0 when
CCR1.2 = 0)
0 = RSYNC is an output
1 = RSYNC is an input (only valid if elastic store enabled)
RCR2.2
Receive Side D4 Yellow Alarm Select.
0 = 0s in bit 2 of all channels
1 = a 1 in the S-bit position of frame 12
RCR2.1
PCVCR Fs-Bit Error Report Enable.
0 = do not report bit errors in Fs-bit position; only Ft bit position
1 = report bit errors in Fs-bit position as well as Ft bit position
RCR2.0
Multiframe Out of Sync Count Register Function Select.
0 = count errors in the framing bit position
1 = count the number of multiframes out of sync
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