DS620 Datasheet, PDF (10/15 Pages) Dallas Semiconductor – Low-Voltage, +-0.5°C Accuracy Digital Thermometer and Thermostat

DS620 Digital Thermometer and Thermostat
PO2
Read/Write
PO1*
Read/Write
A2
Read Only
A1
Read Only
A0
Read Only
M*
Read/Write
*_{Stored in EEPROM}
conversions can be performed.
See Writing the 1SHOT Bit Command Sequence section for writing more
information on writing the 1SHOT bit.
At power-up, PO2 = 1.
PO2 = 0 forces the PO pin low (see Table 3)
PO2 = 1 configures PO as the thermostat output (PO_-HIGH or PO_-LOW, as
determined by PO1).
When PO2 = 1, PO1 configures the PO pin as either PO_-HIGH or PO_-LOW (see
Table 3)
When PO2 = 0, PO1 is a “don’t care”.
Factory state = 0
Shows address bit A₂, as determined by pin A2.
Shows address bit A₁, as determined by pin A1.
Shows address bit A₀, as determined by pin A0.
User memory for general-purpose data storage.
Table 6. Resolution Configuration
R1
R0
Resolution
LSb Weight (°C)
Max Conversion
Time (ms)
0
0
10-bit
0.5
25
0
1
11-bit
0.25
50
1
0
12-bit
0.125
100
1
1
13-bit
0.0625
200
2-WIRE SERIAL DATA BUS
The DS620 communicates over a standard bidirectional 2-wire serial data bus that consists of a serial clock (SCL)
signal and serial data (SDA) signal. The DS620 interfaces to the bus through the SCL input pin and open-drain
SDA I/O pin. All communication is MSb first.
The following terminology is used to describe 2-wire communication:
Master Device: Microprocessor/microcontroller that controls the slave devices on the bus. The master device
generates the SCL signal and START and STOP conditions.
Slave: All devices on the bus other than the master. The DS620 always functions as a slave.
Bus Idle or Not Busy: Both SDA and SCL remain high. SDA is held high by a pullup resistor when the bus is idle,
and SCL must either be forced high by the master (if the SCL output is push-pull) or pulled high by a pullup resistor
(if the SCL output is open-drain).
Transmitter: A device (master or slave) that is sending data on the bus.
Receiver: A device (master or slave) that is receiving data from the bus.
START Condition: Signal generated by the master to indicate the beginning of a data transfer on the bus. The
master generates a START condition by pulling SDA from high to low while SCL is high (see Figure 6). A
“repeated” START is sometimes used at the end of a data transfer (instead of a STOP) to indicate that the master
will perform another operation.
STOP Condition: Signal generated by the master to indicate the end of a data transfer on the bus. The master
generates a STOP condition by transitioning SDA from low to high while SCL is high (see Figure 6). After the
STOP is issued, the master releases the bus to its idle state.
Acknowledge (ACK): When a device (either master or slave) is acting as a receiver, it must generate an
acknowledge (ACK) on the SDA line after receiving every byte of data. The receiving device performs an ACK by
pulling the SDA line low for an entire SCL period (see Figure 6). During the ACK clock cycle, the transmitting
device must release SDA. A variation on the ACK signal is the “not acknowledge” (NACK). When the master device
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