|
DS5000_1 Datasheet, PDF (10/19 Pages) Dallas Semiconductor – Soft Microcontroller Module | |||
|
◁ |
DS5000(T)
AC CHARACTERISTICS
EXPANDED BUS MODE TIMING SPECIFICATIONS
# PARAMETER
SYMBOL
1 Oscillator Frequency
2 ALE Pulse Width
3 Address Valid to ALE Low
4 Address Hold After ALE Low
5 ALE Low to Valid Instr. In
@12 MHz
@16 MHz
1/tCLK
tALPW
tAVALL
tAVAAV
tALLVI
6 ALE Low to PSEN Low
7 PSEN Pulse Width
8 PSEN Low to Valid Instr. In @12 MHz
@16 MHz
tALLPSL
tPSPW
tPSLVI
9 Input Instr. Hold after PSEN Going High
10 Input Instr. Float after PSEN Going High
11 Address Hold after PSEN Going High
12 Address Valid to Valid Instr. In @12 MHz
@16 MHz
13 PSEN Low to Address Float
14 RD Pulse Width
15 WR Pulse Width
16 RD Low to Valid Data In
@12 MHz
@16 MHz
17 Data Hold after RD High
18 Data Float after RD High
19 ALE Low to Valid Data In
@12 MHz
@16 MHz
20 Valid Addr. to Valid Data In @12 MHz
@16 MHz
21 ALE Low to RD or WR Low
22 Address Valid to RD or WR Low
23 Data Valid to WR Going Low
24 Data Valid to WR High
@12 MHz
@16 MHz
tPSIV
tPSIX
tPSAV
tAVVI
tPSLAZ
tRDPW
tWRPW
tRDLDV
tRDHDV
tRDHDZ
tALLVD
tAVDV
tALLRDL
tAVRDL
tDVWRL
tDVWRH
25 Data Valid after WR High
26 RD Low to Address Float
27 RD or WR High to ALE High
tWRHDV
tRDLAZ
tRDHALH
(tA = 0°C to70°C; VCC = 5V + 5%)
MIN
MAX
UNITS
1.0
16
MHz
2tCLK â40
ns
tCLK â40
ns
tCLK â35
ns
4tCLK â150
ns
4tCLK â90
ns
tCLK â25
ns
3tCLK â35
ns
3tCLK â150
ns
3tCLK â90
ns
0
ns
tCLK â20
ns
tCLK â8
ns
5tCLK â150
ns
5tCLK â90
ns
0
ns
6tCLK â100
ns
6tCLK â100
ns
5tCLK â165
ns
5tCLK â105
ns
0
ns
2tCLK â70
ns
8CLK â150
ns
8tCLK â90
ns
9tCLK â165
ns
9tCLK â105
ns
3tCLK â50 3tCLK +50
ns
4tCLK â130
ns
tCLK â60
ns
7tCLK â150
ns
7tCLK â90
ns
tCLK â50
ns
0
ns
tCLK â40
tCLK +50
ns
021998 10/19
|
▷ |