DS2187 Datasheet, PDF (1/10 Pages) Dallas Semiconductor – Receive Line Interface

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FEATURES
Line interface for T1 (1.544 MHz) and CEPT
(2.048 MHz) primary rate networks
Extracts clock and data from twisted pair or
coax
Meets requirements of PUB 43801, TR
62411, and applicable CCITT G.823
Precision on-chip PLL eliminates external
crystal or LC tank - no tuning required
Decodes AMI, B8ZS, and HDB3 coded
signals
Designed for short loop applications such as
terminal equipment to DSX-1
Reports alarm and error events
Compatible with the DS2180A T1/ISDN
Primary Rate and DS2181A CEPT
Transceivers, as well as DS2141A T1 and
DS2143 E1 Controllers
Companion to the DS2186 T1/CEPT
Transmit Line Interface and DS2188
T1/CEPT Jitter Attenuator
Single 5V supply; low-power CMOS
technology
DS2187
Receive Line Interface
PIN ASSIGNMENT
AVDD 1
20 DVDD
RAIS 2
19 RCL
ZCSEN 3
18 AIS
NC 4
17 BPV
LCAP 5
16 NC
RCLKSEL 6
15 NC
RTIP 7
14 RPOS
RRING 8
13 RNEG
LOCK 9
12 RCLK
AVSS 10
11 DVSS
20-Pin SOIC (300-mil)
AVDD 1
18 DVDD
RAIS 2
17 RCL
ZCSEN 3
16 AIS
LCAP 4
15 BPV
RCLKSEL 5
14 NC
RTIP 6
13 RPOS
RRING 7
12 RNEG
LOCK 8
11 RCLK
AVSS 9
10 DVSS
18-Pin DIP (300-mil)
DESCRIPTION
The DS2187 T1/CEPT Receive Line Interface chip interfaces user equipment to North American (T1
1.544 MHz) and European (CEPT 2.048 MHz) primary rate communication networks. The device
extracts clock and data from twisted pair or coax transmission media and eliminates expensive discrete
components and/or manual tuning required in existing T1 and CEPT line termination electronics.
Application areas include DACS, CSU, CPE, channel banks, and PABX-to-computer interfaces such as
DMI and CPI.
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