DS2151Q Datasheet, PDF (1/51 Pages) Dallas Semiconductor – T1 Single-Chip Transceiver

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FEATURES
§ Complete DS1/ISDN-PRI transceiver
functionality
§ Line interface can handle both long- and
short-haul trunks
§ 32-bit or 128-bit jitter attenuator
§ Generates DSX-1 and CSU line build outs
§ Frames to D4, ESF, and SLC-96^R formats
§ Dual onboard two-frame elastic store slip
buffers that connect to backplanes up to 8.192
MHz
§ 8-bit parallel control port that can be used on
either multiplexed or non-multiplexed buses
§ Extracts and inserts Robbed-Bit signaling
§ Detects and generates yellow and blue alarms
§ Programmable output clocks for Fractional T1
§ Fully independent transmit and receive
functionality
§ Onboard FDL support circuitry
§ Generates and detects CSU loop codes
§ Contains ANSI one’s density monitor and
enforcer
§ Large path and line error counters including
BPV, CV, CRC6, and framing bit errors
§ Pin compatible with DS2153Q E1 Single-
Chip Transceiver
§ 5V supply; low power CMOS
§ Industrial grade version (-40°C to +85°C)
available (DS2151QN)
DS2151Q
T1 Single-Chip Transceiver
PIN ASSIGNMENT
FUNCTIONAL BLOCKS
PARALLEL CONTROL
PORT
Dallas
DS2151Q
T1SCT
ACTUAL SIZE OF 44-PIN PLCC
ALE
7
WR
8
RLINK 9
RLCLK
10
DVSS
11
RCLK
12
RCHCLK 13
RSER
14
RSYNC
15
RLOS/LOTC 16
SYSCLK
17
39
TSER
38
TCLK
37
DVDD
36
TSYNC
35
TLINK
34
TLCLK
33 _TCHBLK
32
TRING
31
TVDD
30
TVSS
29
TTIP
DESCRIPTION
The DS2151Q T1 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection
to T1 lines whether they be DS-1 long haul or DSX-1 short haul. The clock recovery circuitry
automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can generate both
DSX-1 line build outs as well as CSU build outs of -7.5 dB, -15 dB, and -22.5 dB. The onboard jitter
attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data
paths. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms.
It is also used for extracting and inserting Robbed-Bit signaling data and FDL data. The device contains
a set of 64 8-bit internal registers which the user can access to control the operation of the unit. Quick
access via the parallel control port allows a single micro to handle many T1 lines. The device fully meets
all of the latest T1 specifications including ANSI T1.403-199X, AT&T TR 62411 (12-90), and ITU
G.703, G.704, G.706, G.823, and I.431.
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