DS1259 Datasheet, PDF (1/5 Pages) Dallas Semiconductor – Battery Manager Chip

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FEATURES
Facilitates uninterruptible power
Uses battery only when primary V_CC is not
available
Low forward voltage drop
Power fail signal interrupts processor or write
protects memory
Consumes less than 100 nA of battery current
Low battery warning signal
Battery can be electrically disconnected upon
command
Battery will automatically reconnect when
V_CC is applied
Mates directly with DS1212 Nonvolatile
Controller x 16 Chip to back up 16 RAMs
Optional 16-pin SOIC surface-mount package
PIN DESCRIPTION
NC
V_BAT
- No Connect
- Battery Input Connection
BF
BAT
RST
GND
- Battery Fail
Output Signal
- Battery Output
- Reset Input
- Ground
PF
V_CCO
V_CCI
- Power Fail
Output Signal
- RAM Supply
- +5V Supply
DS1259
Battery Manager Chip
PIN ASSIGNMENT
NC ¹
VBAT ²
16 _VCCI
15 _VCCI
BF ³
NC ⁴
14 _NC
13 VCCO
BAT 5
12 VCCO
RST ⁶
11 _PF
GND ⁷
10 _NC
GND ⁸
9 _NC
16-Pin DIP Package (300-mil)
See Mech. Drawings Section
NC ¹
16 _VCCI
VBAT ²
15 _VCCI
BF ³
14 NC
NC 4
13 VCCO
BAT 5
12 VCCO
RST ⁶
11 _PF
GND ⁷
GND ⁸
10 _NC
9 _NC
16-Pin SOIC Package (300-mil)
See Mech. Drawings Section
DESCRIPTION
The DS1259 Battery Manager Chip is a low-cost battery management system for portable and nonvolatile
electronic equipment. A battery connected to the battery input pin supplies power to CMOS electronic
circuits when primary power is lost through an efficient switch via the V_CCO pins. When power is supplied
from the battery, the power-fail signal is active to warn electronic reset circuits of the power status.
Energy loss during shipping and handling is avoided by pulsing reset, thereby causing the battery to be
isolated from other elements in the circuits.
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