DS1232LP Datasheet, PDF (1/7 Pages) Dallas Semiconductor – Low Power MicroMonitor Chip

DS1232LP/LPS
DS1232LP/LPS
Low Power MicroMonitor Chip
FEATURES
• Super low-power version of DS1232
• 50 mA quiescent current
• Halts and restarts an out–of–control microprocessor
• Automatically restarts microprocessor after power
failure
• Monitors pushbutton for external override
• Accurate 5% or 10% microprocessor power supply
monitoring
• 8–pin DIP, 8–pin SOIC or space saving µ–SOP pack-
age available
• Optional 16–pin SOIC package available
• Industrial temperature –40°C to +85°C available, des-
ignated N
PIN ASSIGNMENT
PBRST 1
8 V_CC
TD 2
7 ST
TOL 3
6 RST
GND 4
5 RST
DS1232LP 8–Pin DIP
(300 Mil)
See Mech. Drawings
Section
NC
1
16 NC
PBRST
2
15 VCC
NC
3
14
NC
TD
4
13
ST
NC
5
12 NC
TOL
6
11 RST
NC
7
10 _NC
GND
8
9 RST
DS1232LPS 16–Pin SOIC
(300 Mil)
See Mech. Drawings
Section
PBRST 1 8 V_CC
TD 2 7 ST
TOL 3 6 RST
GND 4 5 RST
DS1232LPµ
(118 MIL µ–SOP)
See Mech. Drawings
Section
PBRST
TD
TOL
GND
18
27
36
45
VCC
ST
RST
RST
DS1232LPS–2 8–Pin
SOIC
(150 Mil)
See Mech. Drawings
Section
PIN DESCRIPTION
PBRST
– Pushbutton Reset Input
TD
– Time Delay Set
TOL
GND
– Selects 5% or 10% V_CC Detect
– Ground
RST
– Reset Output (Active High)
RST
– Reset Output (Active Low, open drain)
ST
– Strobe Input
V_CC
– +5 Volt Power
DESCRIPTION
The DS1232LP/LPS Low Power MicroMonitor Chip
monitors three vital conditions for a microprocessor:
power supply, software execution, and external over-
ride. First, a precision temperature–compensated refer-
ence and comparator circuit monitors the status of V_CC.
When an out–of–tolerance condition occurs, an internal
power fail signal is generated which forces reset to the
active state. When V_CC returns to an in-tolerance condi-
tion, the reset signals are kept in the active state for a
minimum of 250 ms to allow the power supply and pro-
cessor to stabilize.
The second function the DS1232LP/LPS performs is
pushbutton reset control. The DS1232LP/LPS de-
bounces the pushbutton input and guarantees an active
reset pulse width of 250 ms minimum. The third function
is a watchdog timer. The DS1232LP/LPS has an inter-
nal timer that forces the reset signals to the active state if
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