MTP3401N3 Datasheet, PDF (1/8 Pages) Cystech Electonics Corp. – P-CHANNEL Enhancement Mode MOSFET

CYStech Electronics Corp.
P-CHANNEL Enhancement Mode MOSFET
MTP3401N3
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 1/8
Features
• VDS=-30V
RDS(ON)=65mΩ@VGS=-4.5V, IDS=-4A
RDS(ON)=120mΩ@VGS=-2.5V, IDS=-1A
• Advanced trench process technology
• High density cell design for ultra low on resistance
• Low gate charge
• Compact and low profile SOT-23 package
• Pb-free & Halogen-free package
Equivalent Circuit
MTP3401N3
Outline
SOT-23
D
G：Gate
S：Source
D：Drain
S
G
Absolute Maximum Ratings (Ta=25°C)
Parameter
Symbol
Limits
Unit
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @TA=25°C (Note 1)
Continuous Drain Current @TA=70°C (Note 1)
Pulsed Drain Current
(Note 2)
Maximum Power Dissipation
Linear Derating Factor
Operating Junction and Storage Temperature
VDS
VGS
ID
ID
IDM
PD
Tj, Tstg
-30
±12
-4.2
-3.5
-30
1.38
0.01
-55~+150
V
V
A
A
A
W
W/°C
°C
Note : 1. Surface mounted on 1 in² copper pad of FR-4 board, 270°C/W when mounted on minimum copper pad.
2. Pulse width limited by maximum junction temperature.
MTP3401N3
CYStek Product Specification