MTEJ0P20L3 Datasheet, PDF (1/8 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C897L3
Issued Date : 2013.03.21
Revised Date :
Page No. : 1/8
P-Channel Logic Level Enhancement Mode Power MOSFET
MTEJ0P20L3 BVDSS
ID
RDSON@VGS=-10V, ID=-1A
RDSON@VGS=-6V, ID=-0.5A
-200V
-1.2A
0.95Ω (typ)
1.0Ω (typ)
Features
• Low Gate Charge
• Simple Drive Requirement
• Pb-free lead plating & halogen-free package
Equivalent Circuit
MTEJ0P20L3
Outline
SOT-223
D
G：Gate D：Drain
S：Source
S
D
G
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ VGS=-10V, TC=25°C
Continuous Drain Current @ VGS=-10V, TC=100°C
Continuous Drain Current @ VGS=-10V, TA=25°C
Continuous Drain Current @ VGS=-10V, TA=70°C
Pulsed Drain Current *1
Avalanche Current
Avalanche Energy @ L=10mH, ID=-1.6A, RG=25Ω
Repetitive Avalanche Energy @ L=0.05mH *2
Total Power Dissipation @TA=25℃
Total Power Dissipation @TA=100℃
Operating Junction and Storage Temperature Range
Symbol
VDS
VGS
ID
IDM
IAS
EAS
EAR
Pd
Tj, Tstg
MTEJ0P20L3
Limits
Unit
-200
±30
V
-1.6
-1
-1.2
A
-0.96
-6.4
-1.6
13
mJ
2
2.5
W
1
-55~+150
°C
CYStek Product Specification