MTEF1P15L3 Datasheet, PDF (1/8 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C896L3
Issued Date : 2013.04.01
Revised Date :
Page No. : 1/8
P-Channel Logic Level Enhancement Mode Power MOSFET
MTEF1P15L3 BVDSS
ID
RDSON@VGS=-10V, ID=-1.4A
RDSON@VGS=-6V, ID=-2A
-150V
-1.4A
0.64Ω (typ)
0.7Ω (typ)
Features
• Low Gate Charge
• Simple Drive Requirement
• Pb-free lead plating & halogen-free package
Equivalent Circuit
MTEF1P15L3
Outline
SOT-223
D
G：Gate D：Drain
S：Source
S
D
G
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ VGS=-10V, TC=25°C
Continuous Drain Current @ VGS=-10V, TC=100°C
Continuous Drain Current @ VGS=-10V, TA=25°C
Continuous Drain Current @ VGS=-10V, TA=70°C
Pulsed Drain Current *1
Avalanche Current
Avalanche Energy @ L=10mH, ID=-1.4A, RG=25Ω
Repetitive Avalanche Energy @ L=0.05mH *2
Total Power Dissipation @TA=25℃
Total Power Dissipation @TA=100℃
Operating Junction and Storage Temperature Range
Symbol
VDS
VGS
ID
IDM
IAS
EAS
EAR
Pd
Tj, Tstg
MTEF1P15L3
Limits
Unit
-150
±30
V
-2
-1.3
-1.4
A
-1.1
-8
-1.4
9.8
mJ
2
2.5
W
1
-55~+150
°C
CYStek Product Specification