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MTDA0P10FP Datasheet, PDF (1/6 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET | |||
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CYStech Electronics Corp.
Spec. No. : C733FP
Issued Date : 2011.03.14
Revised Date :
Page No. : 1/6
P-Channel Logic Level Enhancement Mode Power MOSFET
MTDA0P10FP
BVDSS
-100V
ID
-22A
Features
⢠Low Gate Charge
⢠Simple Drive Requirement
⢠Pb-free lead plating package
RDSON(MAX)
120mΩ
Equivalent Circuit
MTDA0P10FP
Outline
TO-220FP
Gï¼Gate
Dï¼Drain
Sï¼Source
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Symbol
Limits
Unit
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ TC=25°C
Continuous Drain Current @ TC=100°C
Pulsed Drain Current *1
Avalanche Current
Avalanche Energy @ L=0.1mH, ID=-15A, RG=25Ω
Repetitive Avalanche Energy @ L=0.05mH *2
Total Power Dissipation @TC=25â
Total Power Dissipation @TC=100â
Operating Junction and Storage Temperature Range
Note : *1. Pulse width limited by maximum junction temperature
*2. Duty cycle ⤠1%
VDS
-100
VGS
±20
V
ID
-22
ID
-15
A
IDM
-75
IAS
-15
EAS
22.5
mJ
EAR
11.25
Pd
62
W
31
Tj, Tstg -55~+175
°C
MTDA0P10FP
CYStek Product Specification
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