MTD120C10J4 Datasheet, PDF (1/13 Pages) Cystech Electonics Corp. – N & P-Channel Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C986J4
Issued Date : 2014.12.05
Revised Date :
Page No. : 1/13
N & P-Channel Enhancement Mode Power MOSFET
MTD120C10J4
BVDSS
ID@VGS=10V(-10V), TC=25°C
Features
• Low gate charge
• Simple drive requirement
• Pb-free lead plating and halogen-free package
ID@VGS=10V(-10V), TA=25°C
RDSON(TYP)@VGS=10V(-10V)
RDSON(TYP)@VGS=4.5V(-4.5V)
N-CH
100V
9.3A
2.0A
122mΩ
132mΩ
P-CH
-100V
-12A
-2.5A
91mΩ
106mΩ
Equivalent Circuit
MTD120C10J4
Outline
TO-252-4L
G：Gate D：Drain S：Source
Absolute Maximum Ratings (TA=25°C, unless otherwise noted)
Parameter
Symbol
Limits
N-channel P-channel
Unit
Drain-Source Voltage
Gate-Source Voltage
VDS
100
VGS
±20
-100
±20
V
Continuous Drain Current @ TC=25°C, VGS=10V(-10V) (Note1)
Continuous Drain Current @ TC=100°C, VGS=10V(-10V) (Note1)
ID
9.3 -12.0
6.6
-8.5
Continuous Drain Current @ TA=25°C, VGS=10V(-10V) (Note2)
Continuous Drain Current @ TA=70°C, VGS=10V(-10V) (Note2)
IDSM
2.0
1.7
-2.5
A
-2.1
Pulsed Drain Current *1
(Note3) IDM
20
-20
Single Pulse Avalanche Current
IAS
9
-30
Avalanche Energy @ L=0.1mH, ID=IAS, VDD=50V(-50V)
EAS
4
58 mJ
Total Power Dissipation (TC=25℃)
Total Power Dissipation (TC=100℃)
Total Power Dissipation (TA=25℃)
Total Power Dissipation (TA=70℃)
(Note1)
37.5
PD
(Note1)
18.7
W
(Note2)
2.4
PDSM
(Note2)
1.7
Operating Junction and Storage Temperature Range
Tj, Tstg -55~+175
°C
Note : *1. Pulse width limited by maximum junction temperature
*2. Duty cycle ≤ 1%
MTD120C10J4
CYStek Product Specification