MTC6322KS6R Datasheet, PDF (1/12 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode MOSFET

CYStech Electronics Corp.
Spec. No. : C829S6R
Issued Date : 2012.08.10
Revised Date :
Page No. : 1/ 12
N- AND P-Channel Logic Level Enhancement Mode MOSFET
MTC6322KS6R
Features
• Low on-resistance
• ESD protected
• High speed switching
• Low-voltage drive
• Pb-free package
BVDSS
ID
RDSON(typ.) @VGS=(-)4.5V
RDSON(typ.) @VGS=(-)2.7V
N-CH
30V
0.45A
0.86Ω
1.2Ω
P-CH
-30V
-0.45A
0.98Ω
1.44Ω
Equivalent Circuit
MTC6322KS6R
Outline
SOT-363R
Tr1
Tr2
The following characteristics apply to both Tr1 and Tr2
Absolute Maximum Ratings (TA=25°C, unless otherwise noted)
Parameter
Drain-Source Breakdown Voltage
Gate-Source Voltage
Continuous Drain Current @TA=25 °C, VGS=4.5V(-4.5V)
Continuous Drain Current @TA=70 °C, VGS=4.5V(-4.5V)
Pulsed Drain Current (Note 1)
Power Dissipation @TA=25°C
Power Dissipation @TA=70°C
Operating Junction and Storage Temperature Range
Note : 1. Pulse width limited by maximum junction temperature.
2. Pulse width≤ 300μs, duty cycle≤2%.
3.Surface mounted on minimum pad of FR-4 board, t≤5s.
Symbol
Limits
Unit
N-channel P-channel
BVDSS
30
-30
V
VGS
±8
±8
V
ID
0.45
-0.45
A
ID
0.36
-0.36
A
IDM
1.8
-1.8
A
0.30
PD
W
0.18
Tj; Tstg
-55~+150
°C
MTC6322KS6R
CYStek Product Specification