MTBB0P10L3 Datasheet, PDF (1/8 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C732L3
Issued Date : 2013.01.15
Revised Date :
Page No. : 1/8
P-Channel Logic Level Enhancement Mode Power MOSFET
MTBB0P10L3 BVDSS
ID
RDSON@VGS=-10V, ID=-2A
RDSON@VGS=-4.5V, ID=-1A
Features
• Low Gate Charge
• Simple Drive Requirement
• Pb-free lead plating & Halogen-free package
-100V
-2.6A
171mΩ (typ)
186Ω (typ)
Equivalent Circuit
MTBB0P10L3
Outline
SOT-223
D
G：Gate D：Drain
S：Source
S
D
G
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @ VGS=-10V, TA=25°C
Continuous Drain Current @ VGS=-10V, TA=70°C
Pulsed Drain Current *1
Avalanche Current
Avalanche Energy @ L=6mH, ID=-2A, RG=25Ω
Repetitive Avalanche Energy @ L=0.05mH *2
Total Power Dissipation @TA=25℃
Total Power Dissipation @TA=70℃
Operating Junction and Storage Temperature Range
Note : *1. Pulse width limited by maximum junction temperature
*2. Duty cycle ≤ 1%
Symbol
VDS
VGS
ID
ID
IDM
IAS
EAS
EAR
Pd
Tj, Tstg
MTBB0P10L3
Limits
Unit
-100
±20
V
-2.6
-2.1
A
-10.4
-2
12
mJ
0.5
2.5
W
1.6
-55~+150
°C
CYStek Product Specification