FM24W256 Datasheet, PDF (9/14 Pages) Ramtron International Corporation – 256Kb Wide Voltage Serial F-RAM

FM24W256 - 256Kb Wide Voltage I2C F-RAM
AC Parameters (T_A = -40 C to + 85 C, V_DD =2.7V to 5.5V unless otherwise specified)
Symbol Parameter
Min Max Min Max Min
f_SCL
t_LOW
t_HIGH
t_AA
SCL Clock Frequency
Clock Low Period
Clock High Period
SCL Low to SDA Data Out Valid
0 100 0 400 0
4.7
1.3
0.6
4.0
0.6
0.4
3
0.9
t_BUF
Bus Free Before New Transmission 4.7
1.3
0.5
t_HD:STA Start Condition Hold Time
4.0
0.6
0.25
t_SU:STA Start Condition Setup for Repeated 4.7
Start
0.6
0.25
t_HD:DAT
t_SU:DAT
t_R
Data In Hold
Data In Setup
Input Rise Time
0
0
0
250
100
100
1000
300
t_F
t_SU:STO
Input Fall Time
Stop Condition Setup
300
300
4.0
0.6
0.25
t_DH
Data Output Hold
0
0
0
(from SCL @ V_IL)
t_SP
Noise Suppression Time Constant
50
50
on SCL, SDA
Max
1000
0.55
300
100
50
Units
kHz
s
s
s
s
s
s
ns
ns
ns
ns
s
ns
ns
Notes
1
2
2
Notes : All SCL specifications as well as start and stop conditions apply to both read and write operations.
1 The speed-related specifications are guaranteed characteristic points along a continuous curve of operation from
DC to 1 MHz.
2 This parameter is periodically sampled and not 100% tested.
Capacitance (T_A = 25 C, f=1.0 MHz, V_DD = 3V)
Symbol Parameter
Max
C_I/O
Input/Output Capacitance (SDA) 8
C_IN
Input Capacitance
6
Units
pF
pF
Notes
1 This parameter is periodically sampled and not 100% tested.
Notes
1
1
Power Cycle Timing
V_DD
V_DD min.
t_VR
t_PU
t_VF
t_PD
SDA,SCL
Power Cycle Timing (T_A = -40 C to +85 C, V_DD = 2.7V to 5.5V unless otherwise specified)
Symbol Parameter
Min
Max
t_PU
Power Up (V_DD min) to First Access (Start condition)
1
-
t_PD
Last Access (Stop condition) to Power Down (V_DD min)
0
-
t_VR
V_DD Rise Time
30
-
t_VF
V_DD Fall Time
30
-
Notes
1. Slope measured at any point on V_DD waveform.
Units
ms
s
s/V
s/V
Notes
1
1
Document Number: 001-84464 Rev. *A
Page 9 of 14