CY8C24633_10 Datasheet, PDF (9/51 Pages) Cypress Semiconductor – PSoC® Programmable System-on-Chip

CY8C24633
Pinouts
The PSoC CY8C24633 is available in 28-pin SSOP and 56-pin SSOP OCD packages. Refer to the following information for details.
Every port pin (labeled with a “P”), except Vss, Vdd, and XRES in the following tables and illustrations, is capable of Digital I/O.
28-Pin Part Pinout
The 28-pin part is for the CY8C24633 PSoC device.
Table 2. 28-Pin Part Pinout (SSOP)
Pin
No. Digital
Analog
Pin
Name
Description
1 I/O
I
P0[7] Analog Col Mux IP and ADC IP
2 I/O
I/O P0[5] Analog Col Mux IP and Column
O/P and ADC IP
3 I/O
I/O P0[3] Analog Col Mux IP and Column
O/P and ADC IP
4 I/O
I
P0[1] Analog Col Mux IP and ADC IP
5 I/O
P2[7] GPIO
6 I/O
P2[5] GPIO
7 I/O
I
P2[3] Direct switched capacitor input
8 I/O
I
P2[1] Direct switched capacitor input
9 I/O AVref P3[0]^[3] GPIO/ADC Vref (optional)
10 I/O
P1[7] I2C SCL
11 I/O
P1[5] I2C SDA
12 I/O
13 I/O
P1[3] GPIO
P1[1]^[4] GPIO, Xtal input, I2C SCL, ISSP
SCL
14
Power
15 I/O
Vss Ground pin
P1[0]^[4] GPIO, Xtal output, I2C SDA, ISSP
SDA
16 I/O
P1[2] GPIO
17 I/O
P1[4] GPIO, external clock IP
18 I/O
P1[6] GPIO
19
XRES External reset
20 I/O
I
P2[0] Direct switched capacitor input
21 I/O
I
P2[2] Direct switched capacitor input
22 I/O
P2[4] GPIO
23 I/O
P2[6] GPIO
24 I/O
I
P0[0] Analog Col Mux IP and ADC IP
25 I/O
I
P0[2] Analog Col Mux IP and ADC IP
26 I/O
I
P0[4] Analog Col Mux IP and ADC IP
27 I/O
I
P0[6] Analog Col Mux IP and ADC IP
28
Power
Vdd Supply voltage
Figure 3. CY8C24633 PSoC Device
AIO, P0[7] 1
28 Vdd
IO, P0[5] 2
27 P0[6], AIO, AnColMux and ADC IP
IO, P0[3] 3
26 P0[4], AIO, AnColMux and ADC IP
AIO, P0[1] 4
25 P0[2], AIO, AnColMux and ADC IP
IO, P2[7] 5
24 P0[0], AIO, AnColMux and ADC IP
IO, P2[5] 6
23 P2[6], IO
AIO, P2[3]
7
SSOP ^{22 P2[4], IO}
AIO, P2[1]
8
21 P2[2], AIO
AVref, IO, P3[0] 9
20 P2[0], AIO
I2C SCL, IO, P1[7] 10
19 XRES
I2C SDA, IO, P1[5] 11
18 P1[6], IO
IO, P1[3] 12
17 P1[4], IO, EXTCLK
I2C SCL, ISSP SCL, XTALin, IO, P1[1] 13
16 P1[2], IO
Vss 14
15 P1[0], IO, XTALout, ISSP SDA, I2CSDA
LEGEND A = Analog, I = Input, and O = Output
Notes
3. Even though P3[0] is an odd port, it resides on the left side of the pinout.
4. ISSP pin, which is not High Z at POR.
Document Number: 001-20160 Rev. *D
Page 9 of 51
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