CY62167EV18 Datasheet, PDF (9/13 Pages) Cypress Semiconductor – 16-Mbit (1M x 16) Static RAM

CY62167EV18 MoBL^®
Switching Waveforms (continued)
Figure 9 shows BHE/BLE controlled, OE LOW write cycle waveforms.^[22]
Figure 9. Write Cycle No. 4
t_WC
ADDRESS
CE₁
CE₂
BHE/BLE
WE
DATA IO
t_SA
NOTE 23
t_SCE
t_AW
t_BW
t_PWE
t_SD
VALID DATA
t_HA
t_HD
Truth Table
CE₁ CE₂ WE
HXX
XLX
XXX
L HH
L HH
L HH
L HH
L HH
L HH
LHL
LHL
LHL
OE BHE BLE
Inputs/Outputs
X X X High Z
X X X High Z
X H H High Z
L
L
L Data Out (I/O₀–I/O₁₅)
L H L Data Out (I/O₀–I/O₇);
High Z (I/O₈–I/O₁₅)
L
L
H High Z (I/O₀–I/O₇);
Data Out (I/O₈–I/O₁₅)
H L H High Z
H H L High Z
H L L High Z
X
L
L Data In (I/O₀–I/O₁₅)
X H L Data In (I/O₀–I/O₇);
High Z (I/O₈–I/O₁₅)
X L H High Z (I/O₀–I/O₇);
Data In (I/O₈–I/O₁₅)
Mode
Deselect / Power Down
Deselect / Power Down
Deselect / Power Down
Read
Read
Read
Output Disabled
Output Disabled
Output Disabled
Write
Write
Write
Power
Standby (I_SB)
Standby (I_SB)
Standby (I_SB)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Document #: 38-05447 Rev. *G
Page 9 of 13
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