CY25823 Datasheet, PDF (9/12 Pages) Cypress Semiconductor – CK-SSCD Spread Spectrum Differential Clock Specification

AC Electrical Specifications (continued)
Parameter
Description
Condition
T_R / T_F
T_RFM
Tstable^[1]
CLKOUT and CLKOUT# Rise and Fall Times Measured from V_OL = 0.175 to
V_OH = 0.525V
Rise/Fall Matching
Determined as a fraction of
2*(T_R – T_F)/(T_R + T_F)
All clock stabilization from Power-up
∆T_R
∆T_F
V_HIGH
V_LOW
V_OX
V_OVS
Rise Time Variation
Fall Time Variation
Voltage High
Voltage Low
Crossing Point Voltage at 0.7V Swing
Maximum Overshoot Voltage
V_UDS
V_RB
Minimum Undershoot Voltage
Ring Back Voltage
Application Schematic^[2,3]
Measure SE
V DD
CY25823
Min.
175
Max. Unit
700 ps
–
20
%
–
3.0 ms
–
125 ps
–
125 ps
660
850 mv
–150
–
mv
250
550 mv
–
V_HIGH + V
0.3
–0.3
–
V
–
0.2
V
1
CLKIN
2
S3
3
S2
4
S1
7
8
5
V DD
SCLOCK
SDA TA
PW RDW N
6
10ΚΩ
R1
5%
REFOUT/SEL
33Ω 5%
R2
V DDA
V DD
CLKOUT
CLKOUT#
IREF
V SSIREF
V SS
V SSA
16
9
0.1µF
C1
5%
12
R5 33Ω
11
R4 33Ω
5%
14
R3
475Ω
1%
13
10
R6
49.9Ω
1%
Sour c e
T er mi nati on
R7
49.9Ω
1%
15
Separate Ground
Figure 4. Application Schematic
Notes:
1. Not 100% tested, guaranteed by design.
2. V_DD and V_DDA should be tied together and connected to 3.3V.
3. V_SSIREF and V_SS are tied together and are common ground.
Document #: 38-07579 Rev. *C
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