FM24V05_13 Datasheet, PDF (8/17 Pages) Cypress Semiconductor – 512Kb Serial 3V F-RAM Memory

Sleep Mode
A low power mode called Sleep Mode is
implemented on both FM24V05 devices. The device
will enter this low power state when the Sleep
command 86h is clocked-in. Sleep Mode entry can be
entered as follows:
1. The master sends a START command.
2. The master sends Reserved Slave ID 0xF8
3. The master sends the I²C-bus slave address of
the slave device it needs to identify. The last
bit is a „Don‟t care‟ value (R/W bit). Only one
device must acknowledge this byte (the one
that has the I²C-bus slave address).
4. The master sends a Re-START command.
FM24V05 - 512Kb I2C FRAM
5. The master sends Reserved Slave ID 0x86
6. The FM24V05 sends an ACK.
7. The master sends STOP to ensure the device
enters sleep mode.
Once in sleep mode, the device draws I_ZZ current, but
the device continues to monitor the I²C pins. Once
the master sends a Slave Address that the FM24V05
identifies, it will “wakeup” and be ready for normal
operation within t_REC (400 s max.). As an alternative
method of determining when the device is ready, the
master can send read or write commands and look for
an ACK. While the device is waking up, it will
NACK the master until it is ready.
Start
By Master
Address
Start
Address
Stop
S Rsvd Slave ID (F8) A
Slave Address X A S Rsvd Slave ID (86) A P
By FM24V05
Acknowledge
Figure 12. Sleep Mode Entry
Document Number: 001-84462 Rev. *B
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