CY28SRC04 Datasheet, PDF (8/10 Pages) Cypress Semiconductor – PCI-Express Clock Generator

PRELIMINARY
CY28SRC04
AC Electrical Specifications (continued)
Parameter
Description
Condition
SRC
T_DC
SRCT and SRCC Duty Cycle
Measured at crossing point V_OX
T_PERIOD
100-MHz SRCT and SRCC Period
Measured at crossing point V_OX
T_PERIODSS 100-MHz SRCT and SRCC Period, SSC
Measured at crossing point V_OX
T_PERIODAbs 100-MHz SRCT and SRCC Absolute Period Measured at crossing point V_OX
T_PERIODSSAbs 100-MHz SRCT and SRCC Absolute Period, SSC Measured at crossing point V_OX
T_SKEW
Any SRCT/C to SRCT/C Clock Skew
Measured at crossing point V_OX
TSKEW
Any SRCS clock to Any SRCS clock Skew Measured at crossing point V_OX
T_CCJ
SRCT/C Cycle to Cycle Jitter
Measured at crossing point V_OX
L_ACC
SRCT/C Long Term Accuracy
Measured at crossing point V_OX
T_R / T_F
SRCT and SRCC Rise and Fall Times
Measured from V_OL = 0.175 to
V_OH = 0.525V
T_RFM
Rise/Fall Matching
Determined as a fraction of
2*(T_R – T_F)/(T_R + T_F)
∆T_R
Rise TimeVariation
∆T_F
Fall Time Variation
V_HIGH
Voltage High
Math averages Figure 3
V_LOW
Voltage Low
Math averages Figure 3
V_OX
Crossing Point Voltage at 0.7V Swing
V_OVS
Maximum Overshoot Voltage
V_UDS
V_RB
T_CCJ
TLTJ
Minimum Undershoot Voltage
Ring Back Voltage
Cycle to Cycle Jitter
Long Term Jitter
See Figure 3. Measure SE
Measurement at 1.5V
Measurement at 1.5V@1us
Test and Measurement Set-up
For Differential SRC Output Signals
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
Min.
Max. Unit
45
55
%
9.997001 10.00300 ns
9.997001 10.05327 ns
10.12800 9.872001 ns
9.872001 10.17827 ns
–
250 ps
-
250 ps
–
125 ps
–
300 ppm
175
700 ps
–
20
%
–
–
660
–150
250
–
–0.3
–
–
-
125 ps
125 ps
850 mv
–
mv
550 mV
V_HIGH + V
0.3
–
V
0.2
V
350 ps
TBD ps
SRCT
33Ω
100 Ω
4 9 .9 Ω
M easurem ent
P o in t
2pF
33Ω
SRCC
IR E F
475Ω
100 Ω
4 9 .9 Ω
M easurem ent
P o in t
2pF
Figure 3. 0.7V Load Configuration
Document #: 001-00043 Rev. *A
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