CY7C1021BNV33_10 Datasheet, PDF (7/11 Pages) Cypress Semiconductor – 64K x 16 Static RAM

Switching Waveforms (continued)
Write Cycle No. 2 (WE Controlled, OE LOW)
t_WC
ADDRESS
CY7C1021BNV33
CE
t_SCE
t_AW
t_SA
t_PWE
t_HA
WE
t_BW
BHE, BLE
DATA I/O
Truth Table
CE OE WE BLE BHE
I/O₁–I/O₈
H X XX
X
High Z
L L HL
L
Data Out
L
H
Data Out
H
L
High Z
L X LL
L
Data In
L
H
Data In
H
L
High Z
L H HX
X
High Z
L X XH
H
High Z
t_HZWE
t_SD
t_HD
t_LZWE
I/O₉–I/O₁₆
High Z
Data Out
High Z
Data Out
Data In
High Z
Data In
High Z
High Z
Mode
Power-Down
Read - All bits
Read - Lower bits only
Read - Upper bits only
Write - All bits
Write - Lower bits only
Write - Upper bits only
Selected, Outputs Disabled
Selected, Outputs Disabled
Power
Standby (I_SB)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Active (I_CC)
Document #: 001-06433 Rev. *B
Page 7 of 11
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