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CY8CMBR2044_12 Datasheet, PDF (6/29 Pages) Cypress Semiconductor – Four Button CapSense® Controller
CY8CMBR2044
Configuring the CY8CMBR2044
The CY8CMBR2044 device features are configured using
external resistors.
The resistors on the hardware configurable pins are determined
by the device upon power-on.
The Appendix gives the matrix of features enabled using
different external resistor configurations.
To know more about the required settings for your design, refer
to the CY8CMBR2044 Design Guide.
Device Features
CapSense Buttons
■ Device supports up to four CapSense buttons
■ Ground the CSx pin to disable CapSense input
■ A 2.2-nF (+10%) capacitor must be connected on the CMOD pin
for proper CapSense operation
■ The parasitic Capacitance (CP) of each button must be less
than 40 pF for proper CapSense operation
SmartSense Auto Tuning
■ Device supports auto tuning of CapSense parameters
■ No manual tuning required; all parameters are automatically
tuned by the device
■ Compensates printed circuit board (PCB) variations, device
process variations, and PCB vendor changes
■ Ensures portability of the user interface design
General Purpose Outputs
■ The GPOx is controlled by the corresponding CSx
■ GPOx pin outputs are in strong drive mode [3]
■ Active low output – supports sinking configuration
■ If CSx is disabled (grounded), then the corresponding GPOx
must be left floating
■ A 5-ms pulse is sent after 175 ms after device power-up, on a
GPOx, if the CSx fails the System Diagnostics.
Table 2. Advanced Features supported by CY8CMBR2044
Feature
Toggle ON/OFF
Flanking Sensor Suppression
(FSS)
LED ON Time
Button Auto Reset
System Diagnostics
Serial Debug Data
Low Power Sleep Mode and
Deep Sleep Mode
Benefits
Button retains state on touch
(ON/OFF)
Helps in distinguishing closely
spaced buttons
Gives an LED effect on button
release
Disables false output trigger
due to conducting object
placed close to button
Support for production testing
and debugging
Support for production testing
and validating design
Low power consumption
Note
3. When a pin in in strong drive mode, it is pulled up to VDD when the output is HIGH and pulled down to Ground when the output is LOW. The output cannot be floating.
Document Number: 001-57451 Rev. *E
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