CY8C20140 Datasheet, PDF (6/13 Pages) Cypress Semiconductor – CapSense Express™ - 4 Configurable IOs

CY8C20140
DC Electrical Characteristics
DC Chip Level Specifications
Parameter
Description
V_DD
Supply voltage
I_DD
Supply current
I_SB
Sleep mode current with POR and
LVD active. Mid temperature range
I_SB
Sleep mode current with POR and
LVD active.
I_SB
Sleep mode current with POR and
LVD active.
Min
2.40
–
–
–
–
Typ Max
– 5.25
1.5 2.5
2.6
4
2.8
5
5.2 6.4
Unit
Notes
V
mA Conditions are V_DD = 3.0V, T_A = 25°C
µA V_DD = 2.55V, 0°C < T_A < 40°C
µA V_DD = 3.3V, –40°C < T_A < 85°C
µA V_DD = 5.25V, –40°C < T_A < 85°C
5V and 3.3V DC General Purpose IO Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges:4.75V to 5.25V
and -40C<TA<85C, 3.0V to 3.6V -40°C<TA<85°C. Typical parameters apply to 5v and 3V at 25°C and are for design guidance only.
Parameter
Description
Min
Typ
R_PU
V_OH1
Pull up resistor
High output voltage
Port 0 pins
4
5.6
V_DD – 0.2 –
V_OH2
High output voltage
Port 0 pins
V_DD – 0.9 –
V_OH3
High output voltage
Port 1 pins
V_DD – 0.2 –
V_OH4
High output voltage
Port 1 pins
V_DD – 0.9 –
V_OH5
High output voltage
2.75
3.0
Port 1 pins with 3.0V LDO regulator
enabled
V_OH6
High Output Voltage
2.2
–
Port 1 pins with 3.0V LDO regulator
Max
8
–
–
–
–
3.2
–
Unit
Notes
kΩ
V IOH < 10 µA, V_DD > 3.0V, maximum of
20 mA source current in all IOs.
V IOH = 1 mA, V_DD > 3.0V, maximum of
20 mA source current in all IOs.
V IOH < 10 µA, V_DD> 3.0V, maximum of
10 mA source current in all IOs.
V IOH = 5 mA, V_DD > 3.0V, maximum of
20 mA source current in all IOs.
V IOH < 10 µA, V_DD> 3.1V, maximum of
4 IOs all sourcing 5mA.
V IOH = 5 mA, V_DD > 3.1V, maximum of
20 mA source current in all IOs.
V_OH7
V_OH8
V_OL
V_IL
VIH
VIL
V_IH
V_H
I_IL
High Output Voltage
2.1
Port 1 pins with 2.4V LDO regulator
enabled
High Output Voltage
2
Port 1 pins with 2.4V LDO regulator
enabled
Low output voltage
–
Input low voltage
–
Input high voltage
1.6
Input low voltage
-
Input high voltage
2.0
Input hysteresis voltage
–
Input leakage
–
2.4 2.5
V IOH < 10 µA, V_DD > 3.0V, maximum of
20 mA source current in all IOs.
–
–
V IOH < 200 µA, V_DD > 3.0V, maximum
of 20 mA source current in all IOs.
– 0.75
– 0.75
-
-
-
0.8
–
–
140
–
1
–
V IOL = 20 mA, V_DD > 3V, maximum of 60
mA sink current on even port pins and
60 mA sink current on odd port pins
V V_DD = 3.0 to 3.6V.
V V_DD = 3 to 3.6V
V_DD = 3.6 to 5.25V
V V_DD = 3.6 to 5.25V.
mV
nA Gross tested to 1 µA.
Document Number: 001-17348 Rev. *C
Page 6 of 13
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