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| CY62158EV30_09 Datasheet, PDF (6/11 Pages) Cypress Semiconductor – 8-Mbit (1024K x 8) Static RAM | |||
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Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)[15, 16]
tRC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
Read Cycle No. 2 (OE Controlled)[16, 17]
CY62158EV30 MoBL®
DATA VALID
ADDRESS
CE1
CE2
OE
DATA OUT
VCC
SUPPLY
CURRENT
tRC
tACE
tDOE
tLZOE
HIGH IMPEDANCE
tLZCE
tPU
50%
DATA VALID
tHZOE
tHZCE
HIGH
IMPEDANCE
tPD
ICC
50%
ISB
Notes
15. Device is continuously selected. OE, CE1 = VIL, CE2 = VIH.
16. WE is HIGH for read cycle.
17. Address valid before or similar to CE1 transition LOW and CE2 transition HIGH.
Document #: 38-05578 Rev. *D
Page 6 of 11
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