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W48S111-14 Datasheet, PDF (5/11 Pages) Cypress Semiconductor – Spread Spectrum Desktop/Notebook System Frequency Generator
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PRELIMINARYPRELIMI-
W48S111-14
Writing Data Bytes
Each bit in the data bytes control a particular device function
except for the “reserved” bits which must be written as a logic
0. Bits are written MSB (most significant bit) first, which is bit
7. Table 4 gives the bit formats for registers located in Data
Bytes 3–6.
Table 5 details additional frequency selections that are avail-
able through the serial data interface.
Table 6 details the select functions for Byte 3, bits 1 and 0.
Table 4. Data Bytes 3–6 Serial Configuration Map
Affected Pin
Bit Control
Bit(s) Pin No. Pin Name
Control Function
0
1
Default
Data Byte 3
7
--
--
(Reserved)
--
--
0
6
--
--
SEL_2
Refer to Table 5
0
5
--
--
SEL_1
Refer to Table 5
0
4
--
--
SEL_0
Refer to Table 5
0
3
--
--
Frequency Table
Frequency Controlled Frequency Controlled
0
Selection
by external SEL100/ by BYT3 SEL_(2:0)
66# pin (Table 1)
(Table 5)
2
--
--
(Reserved)
--
--
0
1–0
--
--
Bit 1 Bit 0 Function (See Table 6 for function details)
00
0
0 Normal Operation
0
1 Test Mode
1
0 Spread Spectrum on
1
1 All Outputs Three-stated
Data Byte 4
7
--
--
(Reserved)
--
--
0
6
14
24/48MHz Clock output disable
Low
Active
1
5
--
--
(Reserved)
--
--
0
4
--
--
(Reserved)
--
--
0
3
--
--
(Reserved)
--
--
0
2
21
CPU1 Clock Output Disable
Low
Active
1
1
--
--
(Reserved)
--
--
0
0
22
CPU0 Clock Output Disable
Low
Active
1
Data Byte 5
7
4
PCI_F Clock Output Disable
Low
Active
1
6
11
PCI6
Clock Output Disable
Low
Active
1
5
10
PCI5
Clock Output Disable
Low
Active
1
4
-
--
(Reserved)
--
--
0
3
8
PCI4
Clock Output Disable
Low
Active
1
2
7
PCI3
Clock Output Disable
Low
Active
1
1
6
PCI2
Clock Output Disable
Low
Active
1
0
5
PCI1
Clock Output Disable
Low
Active
1
Data Byte 6
7
--
--
(Reserved)
--
--
0
6
--
--
(Reserved)
--
--
0
5
24
IOAPIC Clock Output Disable
Low
Active
1
4
--
--
(Reserved)
--
--
0
3
--
--
(Reserved)
--
--
0
2
--
--
(Reserved)
1
27
REF2X Clock Output Disable
0
27
REF2X Clock Output Disable
Note:
1. Bits 0 and 1 of Data byte 6 in Table 4 MUST be programmed as the same value.
--
Low
Low
--
0
Active
1[1]
Active
1[1]
5
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