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CYIL2SM1300AA_09 Datasheet, PDF (5/41 Pages) Cypress Semiconductor – High Speed CMOS Image Sensor
CYIL2SM1300AA
Electrical Specifications
Exceeding maximum ratings may shorten the useful life of the device. User guidelines are not tested.
Table 4. Absolute Ratings [2]
Symbol
Parameter
Min
VDIG
VIN
IIO
ESD: HBM
Core digital supply voltage
Analog supply voltage
DC supply current
Human Body Model
-0.5
-0.5
2000
ESD: CDM
Charged Device Model
500
TJ
Temperature range
0
Max
Units
5.5
V
5.5
V
mA
V
V
70
°C
Table 5. Power Supply Ratings [3, 4, 5]
Boldface limits apply for TA=TMIN to TMAX, all other limits TA=+25°C. Clock = 315 MHz
Symbol Power Supply
Parameter
Condition
VANA, GNDANA Analog Supply Operating voltage
Dynamic Current
Clock enabled, lux=0
Peak Current
Clock enabled, lux=0
Standby current
Shutdown mode, lux=0
VDIG, GNDDIG Digital Supply
Operating voltage
Dynamic Current
Clock enabled, lux=0
Peak Current
Clock enabled, lux=0
Standby current
Shutdown mode, lux=0
VPIX, GNDPIX Pixel Supply
Operating voltage
Dynamic Current
Clock enabled, lux=0
Peak Current during FOT Clock enabled, lux=0,
transient duration=9 µs
Peak Current during ROT Clock enabled, lux=0,
transient duration=2.5 µs
Standby current
Shutdown mode, lux=0
VLVDS,
GNDLVDS
LVDS Supply
Operating voltage
Dynamic Current
Clock enabled, lux=0
Peak current
Clock enabled, lux=0
Standby current
Shutdown mode, lux=0
VADC, GNDADC ADC Supply
Operating voltage
Dynamic Current
Clock enabled, lux=0
Peak Current
Clock enabled, lux=0
Standby current
Shutdown mode, lux=0
VBUF, GNDBUF Buffer Supply
Operating voltage
Dynamic Current
Clock enabled, lux=0
Peak Current
Clock enabled, lux=0
Standby current
shutdown mode, lux=0
Min
Typ Max Units
-5%
2.5 +5% V
7
20
mA
16
mA
1
mA
-5%
2.5 +5%
V
80
120 mA
130
52
mA
-5%
2.5 +5% V
6
50
mA
1.4
A
35
mA
1
mA
-5%
2.5 +5%
V
220 275 mA
280
mA
100
mA
-5%
2.5 +5%
V
210 275 mA
260
mA
3
mA
-5%
2.5 +5% V
30
50
mA
85
mA
0.1
mA
Notes
2. Absolute ratings are those values beyond which damage to the device may occur.
3. All parameters are characterized for DC conditions after thermal equilibrium is established.
4. Peak currents were measured without the load capacitor from the LDO (Low Dropout Regulator). The 100 nF capacitor bank was connected to the pin in question.
5. This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is recommended that normal precautions
be taken to avoid application of any voltages higher than the maximum rated voltages to this high impedance circuit.
Document Number: 001-24599 Rev. *B
Page 5 of 41
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