CY7C9538 Datasheet, PDF (5/46 Pages) Cypress Semiconductor – OC-48/STM-16 Framer with Reconfigurable VC-POSIC2GVC-R

CONFIDENTIAL
CY7C9538
POSIC2GVC-R also supports non-virtually concatenated
channels. Supported channelized (non-VC) configuration
options for OC-48/STM-16, OC-12/STM-4 and OC-3/STM-1
line rates are shown in Table 2.
Table 2. POSIC2GVC-R Supported SONET/SDH
Channelization (Contiguous Concatenation)
SONET Line Rate
(channelization)
OC-48 (1xSTS-48c)
OC-48 (2xSTS-24c)
OC-48 (4xSTS-12c)
OC-48 (16xSTS-3c)
OC-12 (1xSTS-12c)
OC-12 (4xSTS-3c)
OC-3c (1xSTS-3c)
SDH Line Rate
(channelization)
STM-16 (1xVC4-16c)
STM-16 (2xVC4-8c)
STM-16 (4xVC4-4c)
STM-16 (16xVC4)
STM-4 (1xVC4-4c)
STM-4 (3xVC4)
STM-1 (1xVC4)
(Gigabit
1Gb _Ethernet)
CH ^Packet
1
1Gb
CH ^Packet
2 (Gigabit
Ethernet)
SPI - 3
P
O
Link
S
Layer
I
C
300Mb
CH _{(3x100 Mb}
3
Ethernet
OR TDM in
clear channel
mode)
SONET
Cloud
SPI - 3
P
O
S
Link
I
Layer
C
1Gb _CH
Packet ₁
1Gb
Packet _CH
(Gigabit 2
Ethernet)
300Mb
(3x100 Mb ^CH
Ethernet
3
OR TDM in
clear channel
mode)
16
CH
15
1
n
3
2
1
SONET
CH
Cloud
3
15
2
CH
1
n
16
3
1
CH
3
CH
2
CH
2
(OC3 SPEs may arrive in different order.
At receiveing end, POSIC stores the SPEs in
external memory to re-arrange them in correct order.)
Figure 2. Explanation of Virtual Concatenation
Document #: 38-02095 Rev. *B
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