CY7C261_06 Datasheet, PDF (5/14 Pages) Cypress Semiconductor – 8K x 8 Power-Switched and Reprogrammable PROM

CY7C261
CY7C263/CY7C264
Switching Waveforms^[4]
V_CC
SUPPLY
CURRENT
A₀ - A₁₂
ADDRESS
CS
t_AA
O₀ - O₇
t_PD
50%
t_HZCS
t_PU
50%
t_ACS
Erasure Characteristics
Wavelengths of light less than 4000 angstroms begin to erase
the devices in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended
periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity multiplied by exposure time) of 25 Wsec/cm². For an
ultraviolet lamp with a 12 mW/cm² power rating, the exposure time
would be approximately 35 minutes. The 7C261 or 7C263
needs to be within 1 inch of the lamp during erasure.
Permanent damage may result if the PROM is exposed to
high-intensity UV light for an extended period of time. 7258
Wsec/cm² is the recommended maximum dosage.
Operating Modes
Read
Read is the normal operating mode for programmed device. In
this mode, all signals are normal TTL levels. The PROM is
addressed with a 13-bit field, a chip select, (active LOW), is
applied to the CS pin, and the contents of the addressed location
appear on the data out pins.
Program, Program Inhibit, Program Verify
These modes are entered by placing a high voltage V_PP on pin
19, with pins 18 and 20 set to V_ILP. In this state, pin 21 becomes a
latch signal, allowing the upper 5 address bits to be latched into an
onboard register, pin 22 becomes an active LOW program (PGM)
signal and pin 23 becomes an active LOW verify (VFY) signal. Pins
22 and 23 should never be active LOW at the same time. The
PROGRAM mode exists when PGM is LOW, and VFY is HIGH. The
verify mode exists when the reverse is true, PGM HIGH and VFY
LOW and the program inhibit mode is entered with both PGM and
VFY HIGH. Program inhibit is specifically provided to allow data to be
placed on and removed from the data pins without conflict
Table 1. Mode Selection
Read or Output Disable A₁₂
A₁₁
Mode
Program
NA
V_PP
Read
A₁₂
A₁₁
Output Disable
A₁₂
A₁₁
Program
V_ILP
V_PP
Program Inhibit
V_ILP
V_PP
Program Verify
V_ILP
V_PP
Blank Check
V_ILP
V_PP
A₁₀
LATCH
A₁₀
A₁₀
V_ILP
V_ILP
V_ILP
V_ILP
Pin Function^{[6, 7]}
A₉
PGM
A₈
VFY
A₉
A₉
V_ILP
V_IHP
V_IHP
V_IHP
A₈
A₈
V_IHP
V_IHP
V_ILP
V_ILP
CS
CS
V_IL
V_IH
V_ILP
V_ILP
V_ILP
V_ILP
O₇–O₀
D₇–D₀
O₇–O₀
High Z
D₇–D₀
High Z
O₇–O₀
O₇–O₀
Notes
6. X = “don’t care” but not to exceed V_CC ±5%.
7. Addresses A₈-A₁₂ must be latched through lines A₀-A₄ in programming modes.
Document #: 38-04010 Rev. *C
Page 5 of 14
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