CY7C1041B_05 Datasheet, PDF (5/11 Pages) Cypress Semiconductor – 256K x 16 Static RAM

Switching Characteristics^[4] Over the Operating Range (continued)
Parameter
Description
Read Cycle
t_power
V_CC(typical) to the First Access^[5]
t_RC
Read Cycle Time
t_AA
Address to Data Valid
t_OHA
Data Hold from Address Change
t_ACE
CE LOW to Data Valid
t_DOE
OE LOW to Data Valid
t_LZOE
t_HZOE
t_LZCE
t_HZCE
OE LOW to Low Z
OE HIGH to High Z^{[6, 7]}
CE LOW to Low Z^[7]
CE HIGH to High Z^{[6, 7]}
t_PU
CE LOW to Power-Up
t_PD
CE HIGH to Power-Down
t_DBE
Byte Enable to Data Valid
t_LZBE
Byte Enable to Low Z
t_HZBE
Byte Disable to High Z
WRITE CYCLE^{[8, 9]}
t_WC
t_SCE
t_AW
t_HA
t_SA
t_PWE
t_SD
t_HD
t_LZWE
t_HZWE
t_BW
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z^[7]
WE LOW to High Z^{[6, 7]}
Byte Enable to End of Write
7C1041B-20
Min.
Max.
1
20
20
3
20
8
0
8
3
8
0
20
8
0
8
20
13
13
0
0
13
9
0
3
8
13
CY7C1041B
7C1041B-25
Min.
Max.
Unit
1
µs
25
ns
25
ns
5
ns
25
ns
10
ns
0
ns
10
ns
5
ns
10
ns
0
ns
25
ns
10
ns
0
ns
10
ns
25
ns
15
ns
15
ns
0
ns
0
ns
15
ns
10
ns
0
ns
5
ns
10
ns
15
ns
Data Retention Characteristics Over the Operating Range (L version only)
Parameter
Description
Conditions^[11]
V_DR
V_CC for Data Retention
I_CCDR
t_CDR[3]
t_R[10]
Data Retention Current Com’l
L
Chip Deselect to Data Retention Time
Operation Recovery Time
Notes:
10. t_r < 3 ns for the -12 and -15 speeds. t_r < 5 ns for the -20 and slower speeds.
11. No input may exceed V_CC + 0.5V.
V_CC = V_DR = 3.0V,
CE > V_CC – 0.3V,
V_IN > V_CC – 0.3V or V_IN < 0.3V
Min.
2.0
0
t_RC
Max.
200
Unit
V
mA
ns
ns
Document #: 38-05142 Rev. *A
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