CY62137CV18_02 Datasheet, PDF (5/11 Pages) Cypress Semiconductor – 128K x 16 Static RAM

Switching Characteristics Over the Operating Range^[8] (continued)
Parameter
t_HZWE
t_LZWE
Description
WE LOW to High-Z^{[9, 10]}
WE HIGH to Low-Z^[9]
55 ns
Min.
Max.
20
5
Switching Waveforms
Read Cycle No. 1(Address Transition Controlled)^{[12, 13]}
t_RC
ADDRESS
DATA OUT
t_AA
t_OHA
PREVIOUS DATA VALID
CY62137CV18 MoBL2™
70 ns
Min.
Max.
Unit
25
ns
10
ns
DATA VALID
Read Cycle No. 2 (OE Controlled)^{[13, 14]}
ADDRESS
CE
OE
BHE/BLE
t_RC
t_ACE
t_DOE
t_LZOE
DATA OUT
V_CC
SUPPLY
CURRENT
t_DBE
t_LZBE
HIGH IMPEDANCE
t_LZCE
t_PU
50%
DATA VALID
t_PD
t_HZCE
t_HZOE
t_HZBE
HIGH
IMPEDANCE
I_CC
50%
I_SB
Notes:
12. Device is continuously selected. OE, CE = V_IL, BHE and/or BLE = V_IL.
13. WE is HIGH for read cycle.
14. Address valid prior to or coincident with CE, BHE, BLE, transition LOW.
Document #: 38-05017 Rev. *C
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