CY3138 Datasheet, PDF (5/6 Pages) Cypress Semiconductor – Warp Enterprise™ Verilog CPLD Software

CY3138
an idea of what resources are free. The Architecture Explorer
allows you to zoom in multiple times. At maximum zoom it
displays the logic gate implementation in each macrocell. The
Architecture Explorer is available for PSI and Delta39K
devices.
Timing Analyzer
The Timing Analyzer gives the time across any path as well as
the breakdown of what steps are causing the timing delays.
This tool does not simply display the general specification for
the target device but a worst-case simulation of the actual path
being taken through the device. When you highlight a path on
the timing analyzer, the source and destination of that path are
displayed on the Architecture Explorer. The timing analyzer
graphical interface is also available for PSI and Delta39K
devices. However, for other devices the same information is
available in a report file.
Programming
Cypress’s FLASH370i, Ultra37000, and Delta39K In-System
Reprogrammable™ (ISR™) devices can be programmed on
board with an ISR programmer. For PSI and Delta39K devices
Warp Enterprise produces an Intel hex file. The ISR
programmer converts this file into STAPL and programs the
device. For Ultra37000 and FLASH370i devices, Warp Enter-
prise produces a JEDEC file. For Ultra37000, the ISR
programmer converts this file into JAM/STAPL and programs
the device. For FLASH370i, the JEDEC file is used directly to
program the device.
Warp Enterprise comes with a C3ISR Programming Cable and
a Delta39K\Ultra37000 prototype board with a CY37256V
160-pin TQFP device and a CY39100V 208-pin TQFP device.
The JEDEC and Intel hex files produced by Warp Enterprise
can also be used with any qualified third party programmer to
program Cypress CPLDs.
For more information on Cypress’s ISR software, see the ISR
Programming Kit (CY3900i) data sheet.
Warp^® Software System Requirements
• IBM PC or equivalent (Pentium^® class recommended)
• 32 Mb of RAM (64 Mb recommended)
• 110 Mb Disk Space
• CD-ROM drive
• Windows^® 98, Windows NT^® 4.0, Windows XP
• Warp Enterprise for Verilog hardware key
• Internet access to download upgrades
ISR Software PC System Requirements
• IBM PC or compatible running Windows 98, Windows 98
Second Edition, Windows ME, Windows NT 4.0 Service
Pack 5 or later, or Windows 2000 Service Pack 1 or later
• One free parallel port
• Minimum of 32 MB of RAM
• Approximately 30 MB free hard disk space
Product Ordering Information
Product Code
Description
CY3138R62 Warp Enterprise Verilog CPLD software for
PCs
Warp Enterprise includes:
• Cypress Lab CD-ROM with Warp Enterprise, ISR
software, on-line documentation (Getting Started Manual,
User’s Guide, HDL Reference Manual, Databook) and
other Cypress software
• C3ISR Programming Cable
• Delta39K\Ultra37000 prototype board with a CY37256V
160-pin TQFP device and a CY39100V 208-pin TQFP
Intel and Pentium are registered trademarks of Intel Corporation. Windows and Windows NT are registered trademarks of
Microsoft Corporation. Solaris is a trademark of Sun Microsystems Corporation. Warp is a registered trademark, and Warp
Professional, Warp Enterprise, UltraGen, Ultra37000, Delta39K, PSI, MAX340, ISR, In-System Reprogrammable, and
FLASH370i are trademarks, of Cypress Semiconductor. All product and company names mentioned in this document are the
trademarks of their respective holders.
Document #: 38-03045 Rev. *C
Page 5 of 6
© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.