CY2XF33FLXCT Datasheet, PDF (5/7 Pages) Cypress Semiconductor – 6-Pin Ceramic LCC SMD - Tape and Reel

PRELIMINARY
CY2XF33
Switching Waveforms
Figure 3. Output Voltage Swing
CLK#
CLK
V_OD1
V_OD2
ΔV_OD = V_OD1 - V_OD2
Figure 4. Output Offset Voltage
CLK
CLK#
50Ω
50Ω
V_OS
Figure 5. Output Duty Cycle Timing
CLK
CLK#
T_PERIOD
T_PW
T_DC
=
T_PW
T_PERIOD
Figure 6. Output Rise and Fall Time
CLK#
80% 80%
20%
CLK
20%
T_R
T_F
Figure 7. RMS Phase Jitter
Phase noise
Noise Power
Phase noise mark
Offset Frequency
f1
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
Document Number: 001-53148 Rev. *A
Page 5 of 7
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